Staff Engineer, SRAM Circuit Design

Samsung Semiconductor • San Jose, CA

1d

About The Position

Samsung Semiconductor is seeking a Staff Engineer to lead development of next-generation SRAM solutions. The role drives end-to-end design of high-performance, low-power memory circuits for advanced semiconductor products, influencing power, performance, and area (PPA) efficiency for future computing, mobile, and AI platforms. It combines deep technical expertise with technical leadership and collaboration across design, layout, verification, technology development, product, and test teams.

Requirements

• Bachelor's degree in electrical engineering with 10+ years of industry experience, or a master's degree in electrical engineering with 8+ years of experience; strongly preferred.
• Prior experience in SRAM or memory circuit design and a track record of delivering SRAM designs in advanced process nodes.
• Strong understanding of semiconductor device physics and process technology, including FinFET, GAA, and SOI.
• Expertise in SRAM architecture, including bit cells, sense amplifiers, write drivers, and read/write control paths.
• Familiarity with timing analysis, power analysis, and design for manufacturability (DFM).
• Proficiency in circuit simulation, variation analysis, and design tools such as Spectre, HSPICE, and Cadence Virtuoso.
• Knowledge of scripting languages such as Python, Perl, or TCL for design-task automation.
• Strong cross-functional collaboration and communication skills for working with design, layout, verification, and technology development teams.
• Inclusive approach, adapting communication and working style to diverse global norms.
• Curiosity, resilience, and a data-informed approach to learning and solving challenges.
• Collaborative approach, including relationship-building, offering support, and welcoming others’ approaches.
• Innovative and creative mindset, with proactive exploration of new ideas and adaptability to change.

Nice To Haves

• Experience with advanced technology nodes such as 5nm, 3nm, or beyond.
• Knowledge of SRAM compiler development.
• Experience with low-power SRAM design techniques such as power gating and voltage scaling.
• Background in silicon debug and root-cause analysis.

Responsibilities

• Design and develop SRAM memory arrays, including bit cells, sense amplifiers, decoders, and control circuits for advanced process nodes such as 2nm, 3nm, and 5nm.
• Optimize SRAM designs for performance, power, area (PPA), and yield.
• Develop custom layouts and perform physical design verifications, including DRC and LVS.
• Evaluate speed, power, and area trade-offs to meet design targets.
• Develop and improve SRAM design methodologies, including automation scripts for design, simulation, and verification.
• Work with product and test engineers to develop test plans and support silicon bring-up.
• Mentor junior engineers on SRAM design techniques and best practices.
• Perform circuit simulations using tools such as HSPICE, FineSim, or Cadence Spectre to validate SRAM functionality and performance.
• Contribute to patents, technical papers, or industry conferences to advance SRAM technology.

Benefits

• Medical, dental, and vision coverage.
• 401(k).
• Incentive opportunities based on individual and company performance.
• Charitable giving match and opportunities to participate in community activities.
• 4+ weeks of paid time off per year, plus holidays and sick leave.
• Fertility care or adoption stipend, caregiver support, and medical travel support.
• On-demand emotional wellness apps and free confidential therapy sessions.
• Onsite café and gym, plus virtual fitness classes.
• Flexible work environment.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior