Staff Datapath Design Engineer

Micron Technology•San Jose, CA

1d•$190,000 - $246,000

About The Position

Micron Technology is seeking a Staff Datapath Design Engineer to lead the design, analysis, and optimization of digital and analog circuits for new NAND memory products, with a focus on performance, power, and area (PPA). The role defines architecture and chip plans, including placement and routing optimization, and designs high-speed block-level datapath circuits. It also includes parasitic modeling, layout supervision, and circuit simulations to validate functionality and performance. The engineer collaborates with domain experts and partners to review design details and ensure operation within safe reliability ranges. The position contributes to new product opportunities through the design, layout, and optimization of memory, logic, and analog circuits; performs modeling- and simulation-based verification; and supports cross-group communication and standardization. The stated U.S. base salary range is $190,000 to $246,000.

Requirements

Bachelor’s degree in Electrical Engineering, Computer Science, or a related field.
Five years of progressive, post-baccalaureate experience in the job offered or a related occupation.
Experience with high-speed circuit performance, power, and area optimization.
Circuit simulation experience using System Verilog, HSPICE, or other SPICE simulators.
Ability to analyze silicon data and make circuit changes.
Circuit reliability verification experience involving aging, electromigration, and self-heating.
Layout review and STARRC extraction experience.

Responsibilities

Lead the design, analysis, and optimization of digital and analog circuits for new NAND memory products, optimizing performance, power, and area.
Define architecture and chip plans, including placement and routing optimization.
Design high-speed datapath circuits at the block level, model parasitics, and supervise layout.
Perform circuit simulations to validate functionality and performance.
Collaborate with domain experts and partners to review design details and ensure designs operate within safe reliability ranges.
Assist with the design, layout, and optimization of memory, logic, and analog circuits for new product opportunities.
Perform verification using modeling and simulation.
Contribute to cross-group communication, standardization, and group success.