Sr Staff Engineer - Verification, CI/CD Infrastructure & Embedded Hardware (AISW)
About The Position
The Sr Staff Engineer Engineer, Verification (CI/CD & Embedded HW) is a senior individual contributor responsible for designing, scaling, and hardening CI/CD infrastructure and verification systems that validate Qualcomm’s AI Software stack—including QNN HTP, QAIRT, toolchains, kernels, and embedded runtime components. This role is deeply technical and hands‑on: you will build large‑scale automated pipelines, integrate embedded hardware (DSP, NPU) test execution, drive target‑based regression infrastructure, and ensure efficient, reliable, and high‑signal validation at scale. You can apply past experience managing large CI/CD pipelines to quickly target issues that arise to a software and/or hardware level.
Requirements
- 10+ years in CI/CD engineering, verification, embedded systems, or runtime/toolchain development.
- Expertise designing/scaling CI/CD (Buildkite, Jenkins, GitLab CI, GitHub Actions).
- Deep experience integrating embedded hardware into automated pipelines.
- Background in firmware flashing, device provisioning, power/reset automation, and board‑farm debugging.
- Strong scripting/programming in Python, Bash, C/C++.
- Experience maintaining open‑source verification pipelines.
- Strong debugging across runtime/driver/inference layers.
- Ability to influence cross‑functional engineering teams.
- Bachelor's degree in Computer Science, Engineering, Information Systems, or related field and 6+ years of Hardware Engineering, Software Engineering, Systems Engineering, or related work experience.
- Master's degree in Computer Science, Engineering, Information Systems, or related field and 5+ years of Hardware Engineering, Software Engineering, Systems Engineering, or related work experience.
- PhD in Computer Science, Engineering, Information Systems, or related field and 4+ years of Hardware Engineering, Software Engineering, Systems Engineering, or related work experience.
Nice To Haves
- Familiarity with Qualcomm AI stack (QNN, QAIRT, SNPE).
- Experience with heterogeneous compute validation (DSP/GPU/CPU/NPU).
- Background in silicon bring‑up or hardware‑in‑loop systems.
- Experience with large device‑farm operation and automation.
Responsibilities
- Architect and scale large‑distributed CI/CD systems with high throughput and low flakiness.
- Design automated workflows: build, package, deploy, flash, run, log‑collection, triage, dashboarding.
- Develop scheduling/orchestration layers for thousands of HW‑based regression tests.
- Implement monitoring, telemetry, and automated mitigation for CI stability.
- Develop embedded target test frameworks across DSP/NPU.
- Automate flashing, provisioning, power/reset, and new chipset bring‑up.
- Design hardware‑in‑loop validation for stability, thermal, long‑run correctness, and performance.
- Own coverage strategy for throughput, correctness, memory behavior, and runtime scheduling.
- Develop automated triage signals and failure classification systems.
- Eliminate flakiness and nondeterminism in HW test environments.
- Maintain CI/verification pipelines for internal and open‑source projects.
- Enforce PR gating, reproducible builds, artifact management, and API correctness.
- Influence DevOps, firmware, and platform teams using data‑driven insights.
- Lead technical deep‑dives on CI and embedded HW failures.
- Align infrastructure capabilities with program milestones and customer requirements.
- Produce high‑quality documentation for CI architecture, HW frameworks, and best practices.
- Drive continuous improvement and streamline reproducible HW testing workflows.
Benefits
- Competitive annual discretionary bonus program
- Opportunity for annual RSU grants
- Highly competitive benefits package designed to support your success at work, at home, and at play.
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What This Job Offers
Job Type
Full-time
Career Level
Senior
