Sr Staff Engineer, Program/Project Management- Test Readiness Lead-CB Tray

Celestica International LP•Richardson, TX

52d•Onsite

About The Position

As the Senior Manager of HPS Test Engineering, you will own the end-to-end testing architecture, strategy, and execution for next-generation or products and infrastructure. This position bridges the gap between top-tier silicon designers, internal hardware/software teams, and volume manufacturing operations. You will be responsible for leading a high-performing team of test hardware and software engineers to develop comprehensive test solutions (ICT, FCT, SLT, BI and Boundary Scan). You will maintain critical cross-functional alignment with the Front-End Senior Manager, Back-End Senior Manager, and Director of Technology Roadmapping to maximize test coverage, minimize escape metrics, and optimize manufacturing throughput and first-pass yield.

Requirements

5+ years of direct experience leading and scaling multi-disciplinary test hardware and software engineering teams.
Proven experience deploying complex test vectors for high-speed digital systems, enterprise servers, hyperscaler infrastructure, or working directly alongside tier-1 silicon providers (Nvidia, Broadcom, Marvell).
Expert level understanding of DFT methodologies, IEEE 1149.x Boundary Scan (JTAG), high-speed serial links (PCIe Gen 5/6, SerDes), instrumentation automation, programming frameworks (Python, C/C++, LabVIEW), and database/data mining systems for statistical process control (SPC).
Outstanding project management maturity with a focus on metrics-driven problem solving (Six Sigma Black Belt preferred); ability to translate technical yield constraints to business risks for C-suite and customer reviews.
8+ years of dedicated engineering experience in Test Development, Functional Testing architecture, ATE hardware infrastructure, or NPI Test leadership inside high-density hardware industries.
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.

Nice To Haves

Six Sigma Black Belt preferred

Responsibilities

Directly manage, coach, and mentor a specialized team of Test Hardware and Software Engineers, fostering technical proficiency in advanced diagnostic test development and automated frameworks.
Define clear test engineering metrics, KPIs, and deliverables; conduct objective performance evaluations and outline robust engineering career paths.
Plan and manage engineering bandwidth, test equipment budgets (CapEx), and lab infrastructure allocations across concurrent high-visibility NPI initiatives.
Drive comprehensive DFT/DFx technical reviews during early schematic and board layout design stages to maximize structural and functional test access.
Engage directly with tier-1 silicon architects (e.g., Nvidia, Broadcom, Marvell, Intel, AMD) to embed built-in self-test (BIST), high-speed JTAG boundary scan architectures, and advanced custom diagnostic hooks.
Formulate unified product test specifications (PTS) defining rigorous test coverage matrices, test point allocations, and optimization bounds before design freeze.
Oversee the specification, architecture, and deployment of In-Circuit Test (ICT), Functional Test (FCT), System-Level Test (SLT), and Environmental Stress Screening (ESS/Burn-in) solutions.
Analyze production data sets to identify false failures, test instabilities, and gauge R&R shortfalls, systematically driving continuous optimization of test limits and fixture designs.
Provide hands-on engineering guidance for initial test vehicle bring-up and debugs, test fixture qualification, diagnostic software stability checks, and strict version control for test binaries.