Ayar Labs is seeking a Sr. / Staff. Engineer to join its Link Design and Architecture team in San Jose, California. The role owns the statistical work that connects photonic-device measurements to models. Measurements come from wafer, package, and system levels, both from Ayar Labs’ test floor and from foundry and vendor partners. The engineer will convert these data into statistical descriptions of each device, including distributions, variation across lots, wafers, and dies, and parameter correlations; prepare statistical inputs for compact models and link simulations; and track how well full simulation models match full-system measurements so discrepancies can be identified early. The Link Design and Architecture team works on optical-link robustness and performance, from component-level modeling through architecture definition, link analysis, specification development, and yield prediction. It also explores next-generation link architectures that inform the company’s long-term roadmap.
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Job Type
Full-time
Career Level
Senior