Sr. Staff Analog Engineer
About The Position
SiTime is the Precision Timing company. Timing is the heartbeat of all electronics, ensuring performance, resilience and scalability. For decades, quartz devices, non-silicon technology, have kept systems in sync, but they struggle in harsher, more demanding environments. MEMS-based Precision Timing delivers greater accuracy, smaller size and resilience. Today, MEMS timing powers over 400 applications, including high-growth ones in AI datacenters, automated driving, industrial and humanoid robots, wearables and IoT. Our semiconductor MEMS programmable solutions offer a rich feature set that enables customers to differentiate their products with higher performance, smaller size, lower power, and better reliability. With more than 4 billion devices shipped, SiTime is changing the timing industry. For more information, visit: www.sitime.com. SiTime is seeking a Senior Staff Analog Design Engineer to provide technical leadership in developing advanced clock and timing products. This role combines hands-on circuit design expertise with strong system-level understanding to balance performance, schedule, and cost trade-offs. Working closely with test and validation, program management, product engineering, and other functional teams, you will align technical solutions with business goals and drive projects from concept through successful execution in a collaborative, fast-paced environment.
Requirements
- Master’s or PhD degree in Electrical Engineering
- 10+ years of relevant experience in analog/mixed-signal CMOS design
- Strong knowledge of integrated circuit design, device physics, and process technology
- Experience designing PLLs or related building blocks, including VCOs, phase detectors, charge pumps, and similar circuits
- Deep understanding of transistor behavior, circuit noise theory, and phase noise concepts
- Proficiency with the Cadence analog/mixed-signal simulation toolset
- Familiarity with analog/mixed-signal design flow, simulation methods, design rules, post-layout verification
- Experience with analog behavioral modeling using SystemVerilog, Verilog-A, or AMS
- Hands-on experience with lab testing and characterization
Nice To Haves
- Collaborative, self-motivated, and positive team contributor
- Able to empower others and provide effective mentorship
- Strong analytical and problem-solving skills
Responsibilities
- Define, design, and develop innovative circuits for high-performance timing products
- Mentor, lead, and guide junior designers
- Collaborate effectively with remote engineering teams
- Support prototype testing, debugging, and lab characterization
- Provide technical support across the full product development cycle through production release
Benefits
- Quarterly bonus tied to the achievement of innovation goals
- Equity grants
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What This Job Offers
Job Type
Full-time
Career Level
Senior
