Sr. Semiconductor Test Engineer

Mythic•Austin, TX

About The Position

Mythic is hiring a hands-on test engineer to own production testing for its analog compute-in-memory AI inference processors across the full silicon lifecycle, from bring-up and characterization through Wafer Sort, Final Package Test, and high-volume manufacturing. This is a build-focused role responsible for defining the methodology, coverage strategy, screening philosophy, release criteria, test programs, and infrastructure used to test and ship silicon. The engineer will set strategy while also writing code, debugging hardware, and analyzing manufacturing data. The role works closely with design, DFT, product engineering, reliability, manufacturing, OSATs, foundries, and ATE vendors. Key goals include establishing robust production flows, supporting product ramps and releases, improving yield and correlation, and balancing test coverage, cost, test time, quality, and schedule.

Requirements

At least 5 years of experience in semiconductor test engineering, product engineering, or production test development.
Hands-on ownership of Wafer Sort and Final Package Test.
Experience developing, debugging, and releasing production test programs on ATE platforms.
Ability to convert and translate test patterns from STIL, WGL, and VCD into ATE-specific pattern formats.
Solid grounding in manufacturing test flows, device screening, test coverage, guardbanding, and outgoing quality.
Experience taking silicon through bring-up, characterization, yield ramp, and production release.
Strong debugging skills and fluency with manufacturing test data.
Experience working with design, DFT, product, reliability, and operations teams.

Nice To Haves

Experience testing mixed-signal or analog silicon, including trim and calibration.
Experience with AI, accelerator, or high-performance-computing silicon.
Experience with Advantest, Teradyne, or similar ATE platforms.
Experience with probe cards, load boards, hardware interfaces, and test hardware debugging.
Experience with DFT structures such as scan, MBIST, and boundary scan.
Experience managing OSATs and other external manufacturing partners.
Experience with scripting, automation, and test-data analysis, such as Python, JMP, or yield-analysis tools.
A track record of reducing test time and improving yield and correlation during ramp.

Responsibilities

Own Mythic’s end-to-end production test strategy across Wafer Sort, Final Package Test, characterization, screening, and volume ramp.
Develop test programs for new silicon products, from development and debugging through production release and optimization.
Define test methodology, coverage strategy, screening philosophy, and release criteria.
Lead silicon bring-up, characterization, correlation, guardbanding, and transfer of tests into manufacturing.
Analyze yield and quality, identify systematic failures and escapes, and drive issues to root cause.
Work with OSATs, foundries, and ATE vendors to deploy and sustain test flows.
Manage tradeoffs across test coverage, cost, test time, quality, and ramp schedule.
Build infrastructure, automation, and analytics for production test and yield learning.
Write code, debug hardware, and analyze manufacturing data directly.
Collaborate with design, DFT, product engineering, reliability, manufacturing, and operations teams.