Sr. FPGA Engineer, Amazon Leo

AmazonRedmond, WA
$159,200 - $215,300Onsite

About The Position

Amazon's Low Earth Orbit (LEO) initiative is building next-generation satellite communication systems to deliver high-speed broadband connectivity globally. Our silicon group develops cutting-edge FPGA prototypes and ASIC designs for advanced satellite communication systems. We are seeking an experienced Senior FPGA Engineer to join our LEO silicon team. This role will contribute to the design, development, and verification of FPGA-based prototypes for our satellite communication systems, including transmit (Tx) and receive (Rx) signal processing chains.

Requirements

  • Bachelor's degree in electrical engineering, computer engineering, or equivalent
  • 7+ years of FPGA development experience
  • Proven track record of completing full FPGA product cycles from concept through production
  • Strong Digital Signal Processing (DSP) background with experience implementing DSP algorithms in hardware
  • Excellent lab and debugging skills with experience in hardware bring-up and troubleshooting
  • Proficiency with FPGA design tools (Xilinx Vivado, Intel Quartus, or similar)
  • Strong knowledge of HDL languages (Verilog, VHDL, SystemVerilog)
  • Experience with high-speed interfaces (PCIe, Ethernet, SERDES, etc.)

Nice To Haves

  • Experience with communication systems or RF signal processing
  • Knowledge of satellite communication protocols and standards
  • Experience with FPGA prototyping for ASIC development
  • Familiarity with scripting languages (Python, TCL, Perl)
  • Experience with version control systems and CI/CD workflows
  • Strong problem-solving skills and ability to work in a fast-paced environment

Responsibilities

  • Lead FPGA design and implementation for complex digital signal processing systems in satellite communication applications
  • Drive FPGA projects through the complete product development lifecycle from architecture to production
  • Design, implement, and optimize DSP algorithms on FPGA platforms
  • Perform hands-on lab work including hardware bring-up, debugging, and validation
  • Collaborate with ASIC design teams to support RTL development and verification
  • Mentor junior engineers and provide technical leadership on FPGA best practices
  • Work with cross-functional teams including system architects, software engineers, and hardware engineers

Benefits

  • health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage)
  • 401(k) matching
  • paid time off
  • parental leave
  • sign-on payments
  • restricted stock units (RSUs)
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