Sr. Engineer, RTL Implementation

Tenstorrent•Austin, TX

7d•$100,000 - $500,000•Hybrid

About The Position

Tenstorrent is looking for a talented engineer to join their CPU design team. The role involves iterating through front-end CAD flows on multiple process technologies, working closely with core micro-architects to refine CPU core configurations and optimizing PPA. The engineer will work on a CPU based on RISC-V ISA, collaborating with DV, PD, RTL and performance teams to deliver a functional, timing, and power-converged design. This role is hybrid, based out of Austin, TX or Santa Clara, CA. The company welcomes candidates at various experience levels, and offers will align with the assessed level.

Requirements

Experienced in high-performance physical design.
Proficient in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation and power analysis.
Skilled in synthesis, place and route tools including flows and physical design methodology.
Background in CPU micro-architecture.

Responsibilities

Perform synthesis and initial place and route for new and legacy designs.
Collaborate closely with core micro-architects to optimize core configurations for best PPA.
Use innovative techniques to optimize power, performance, and area while driving physical design experiments and evaluating results.
Enhance physical design environment, tools, and methodologies to improve development efficiency.