SR ENGINEER, HIG HBM SOC VERIFICATION

Micron Technology•Richardson, TX

About The Position

Micron Technology is seeking a Sr Engineer for HIG HBM SOC Verification. The role develops and analyzes SoC-level test plans and coverage, and builds verification environments for complex SoCs. It develops randomized and directed tests in RTL and gate-level simulation (GLS) environments and reviews architectural specifications to ensure quality. The engineer works with customers to understand verification and validation requirements, provide necessary collateral, support issues with current HBM architectures, and identify opportunities for future HBM solutions. The role also coordinates with IP suppliers to ensure appropriate verification and validation collateral is available. It identifies quality issues, performance problems, and opportunities to reduce power consumption, and debugs pre-silicon and post-silicon issues in current HBM products and architectures. Micron describes its benefits as supporting employee wellbeing and professional growth, with medical, dental, and vision plan options, income-protection programs for illness or injury, paid family leave, paid time off, and paid holidays.

Requirements

Bachelor’s degree in Electrical and Computer Engineering, or a related field.
Three years of experience in the job offered or a related occupation.
Experience with SoC or IP verification.
Experience writing tests and developing verification environments using SystemVerilog and UVM.
Experience building verification environments or validating complex SoCs.
Experience working with IP vendors and verifying IP integration.
Experience with gate-level simulation (GLS).
Experience with Python.
Experience with UCIE, memory controllers, NOCs, MBIST, or ATPG scan controllers.
Knowledge of DRAM operation and JEDEC specifications, such as the HBM product family.

Responsibilities

Develop SoC-level test plans and analyze coverage.
Build verification environments for complex SoCs.
Develop randomized and directed tests in RTL and GLS environments.
Review architectural specifications to ensure high quality.
Work with customers to understand verification and validation requirements and provide necessary collateral.
Support customer issues with current HBM architectures and identify opportunities to innovate on future HBM solutions.
Work with IP suppliers to ensure appropriate verification and validation collateral is provided.
Identify quality issues, performance problems, and opportunities to reduce power consumption.
Debug pre-silicon and post-silicon issues and identify root causes and solutions for current HBM products and architectures.