About The Position

This role involves owning and building the regression test environment for the digital subsystem of high-performance Quad ADC chip products. The design is primarily mixed-signal/analog with a critical section of high-speed digital logic operating at 250 MHz to 1 GHz. The position requires quickly ramping up on existing architecture and environment, creating and executing robust regression testbenches, and verifying DSP blocks and high-speed data paths. This role is suitable for a US Citizen or Lawful Permanent Resident and is located in San Diego, CA, with a hybrid work arrangement.

Requirements

  • Minimum BS degree in EE/ECE/CS
  • 10+ years of hands-on digital verification experience
  • Cadence Xcelium simulation environment expert
  • Experience with SPI protocols
  • Experience with high-frequency (250 MHz–1 GHz) mixed-signal logic
  • Solid understanding of DSP verification
  • Proven ability to use AI tools for efficient data/log analysis and faster debugging
  • US Citizen or Lawful Permanent Resident

Responsibilities

  • Own and build the regression test environment for the digital subsystem of high-performance Quad ADC chip products.
  • Create and execute robust regression testbenches.
  • Verify DSP blocks and high-speed data paths.
  • Ramp up quickly on existing architecture and environment.

Benefits

  • Salary
  • Bonuses
  • 15 days of PTO per calendar year
  • 10 paid Holidays per calendar year
  • Comprehensive Medical Benefits: Company covers 80% of premiums for Employee and Dependents
  • Dental & Vision: Company covers 50% of premiums for Employee and Dependents
  • Voluntary Benefits: Life Insurance, FSA (Health and Dependent, Limited Purpose), HAS, and Gap Insurance
  • Employee Assistant Program (EAP)
  • 401k - Traditional & Roth
  • Life/AD&D and Long-Term Disability
  • Tuition reimbursement
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