Sort/Test Quality & Reliability Engineer (QRE)

Intel•Hillsboro, OR
•Hybrid

About The Position

The Sort/Test Quality & Reliability Engineer leads quality and reliability readiness for tester hardware, test modules, test processes, manufacturing systems, and supplier-developed solutions used in semiconductor development and high-volume manufacturing. The role drives shift-left risk prevention, qualification rigor, test-process certification, and disciplined high-volume manufacturing (HVM) transfer through cross-functional work with Test Development, Product Engineering, Manufacturing QnR, ATM, factories, suppliers, and ODM partners. The engineer leads test-process pathfinding, development, qualification, certification, and HVM ramp across products, architectures, sort, and back-end test. They define requirements, readiness criteria, acceptance plans, FMEA, and mitigation closure; lead qualification and release reviews; ensure processes meet quality, yield, capability, stability, cost, and customer-risk objectives; and support technology transfer to ATM factories. The role also owns certification methods and release criteria, deploys quality management systems, leads investigations and corrective actions, and uses statistical analysis and manufacturing data to monitor process health and improve qualification and certification decisions.

Requirements

  • Bachelor's degree with 4+ years of relevant experience, or a Master's degree with 3+ years of relevant experience, or a PhD in Mechanical Engineering, Materials Science, Metallurgy, Chemical Engineering, Electrical Engineering, Chemistry, Physics, Reliability Engineering, or a related technical field.
  • Experience in one or more of test-process development, product development, HVM factory operations, semiconductor manufacturing, product-test methodology and standards, die preparation, SORT/SDx, hardware development, reliability engineering, failure analysis, or process certification.
  • Demonstrated ability to lead risk assessments, qualification plans, corrective actions, readiness reviews, technical decisions, and cross-functional execution.
  • Strong statistical, analytical, written, and verbal communication skills, including the ability to translate technical risk into clear actions and decisions.

Nice To Haves

  • Knowledge of semiconductor test and flow, including wafer sort, die sort, final test, burn-in, SLT, HDMT/AHMT, V93K/Advantest, die preparation, probing, package assembly, back-end test, and end-to-end material flow from silicon fab to customer.
  • Experience with Test Process Definition, Test Process Certification, ATTD development, HVM transfer, and ATM excursion management.
  • Ability to identify electrical, thermal, mechanical, contamination, ESD, and test-induced product risks; define mitigation plans and closure criteria; and track risks through development, qualification, and production ramp.
  • Experience with FMEA, Control Plan, SPC, OCAP, 8D, DOE, reliability validation, and change control.
  • Experience with JMP/JSL, SQL, statistical modeling, process capability, correlation, and predictive monitoring.
  • Knowledge of advanced packaging, foundry manufacturing, supplier quality, and ODM manufacturing systems.

Responsibilities

  • Lead pathfinding, test-process development, qualification, certification, and HVM ramp across products, architectures, Sort, and back-end test.
  • Define QnR requirements, readiness criteria, acceptance plans, FMEA, and mitigation closure for tester platforms, modules, interface hardware, burn-in, wafer/die sort, metrology, and supplier hardware.
  • Lead Installation Qualification, Module Operational Qualification, Measurement System Analysis, HVM and Transfer Qualification, Reliability Validation, Change Qualification, and production release reviews.
  • Ensure test processes meet quality, yield, miscorrelation, gain, capability, stability, cost, and customer-risk objectives before transfer and during ramp.
  • Enable timely transfer to ATM factories and provide IPG QRE support for engineering, qualification, pilot, and revenue production.
  • Own, define, and update Test Process Certification methods, specifications, critical success indicators, qualification templates, and release criteria.
  • Establish and maintain FMEA, Control Plans, MSA, SPC, OCAP, calibration, traceability, data integrity, change control, work instructions, and audit-ready evidence.
  • Lead MQE, excursion, yield, hardware, and reliability investigations using 8D, 5 Why, fault isolation, DOE, and model-based problem solving; verify corrective-action effectiveness and recurrence prevention.
  • Use statistical analysis and manufacturing data to monitor process health, predict emerging risks, reduce escapes, improve qualification efficiency, and strengthen certification decisions.

Benefits

  • Competitive pay
  • Stock bonuses
  • Health benefits
  • Retirement benefits
  • Vacation
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