Sort/Test Quality & Reliability Engineer (QRE)

Intel Corporation•Hillsboro, OR
•$120,860 - $231,670•Hybrid

About The Position

Embark with us on a journey of growth and transformation as we create exceptionally engineered technology and bring AI everywhere. As a valued team member, your adaptability and attention to detail will contribute to our drive for results and relentless pursuit of quality, ensuring we meet our customers' needs with precision. Join us and build on our legacy of innovation and collaboration as we deliver world‑changing technology that improves the life of every person on the planet. As a Sort/Test Quality & Reliability Engineer, you will lead quality and reliability readiness for tester hardware, test modules, test processes, manufacturing systems, and supplier-developed solutions used in semiconductor development and high-volume manufacturing. Drive shift-left risk prevention, qualification rigor, test process certification, and disciplined HVM transfer through cross-functional execution with Test Development, Product Engineering, Manufacturing QnR, ATM, factories, suppliers, and ODM partners.

Requirements

  • Bachelor's degree with 4+ years of relevant experience, OR Master's degree with 3+ years of relevant experience, OR PhD in Mechanical Engineering, Materials Science, Metallurgy, Chemical Engineering, Electrical Engineering, Chemistry, Physics, Reliability Engineering, or a related technical field.
  • Experience in one or more of the following: test process development, product development, HVM factory operations, semiconductor manufacturing, product test methodology and standards, die preparation, SORT/SDx, hardware development, reliability engineering, failure analysis, or process certification.
  • Demonstrated ability to lead risk assessments, qualification plans, corrective actions, readiness reviews, technical decisions, and cross-functional execution.
  • Strong statistical, analytical, written, and verbal communication skills, including the ability to translate technical risk into clear actions and decisions.

Nice To Haves

  • Semiconductor Test and Flow
  • Wafer sort, die sort, final test, burn-in, SLT, HDMT/AHMT, V93K/Advantest
  • Die prep, probing, package assembly, back-end test, and end-to-end material flow from silicon fab to customer
  • Test Process Definition, Test Process Certification, ATTD development, HVM transfer, and ATM excursion management
  • Identify electrical, thermal, mechanical, contamination, ESD, and test-induced product risks.
  • Define mitigation plans and closure criteria.
  • Ensure risks are tracked through development, qualification, and production ramp.
  • FMEA, Control Plan, SPC, OCAP, 8D, DOE, reliability validation, and change control
  • Electrical, thermal, mechanical, contamination, ESD, and test-induced product risk assessment
  • JMP/JSL, SQL, statistical modeling, process capability, correlation, and predictive monitoring
  • Advanced packaging, foundry manufacturing, supplier quality, and ODM manufacturing systems

Responsibilities

  • Lead pathfinding, test process development, qualification, certification, and HVM ramp across products, architectures, Sort, and back-end test.
  • Define requirements, readiness criteria, acceptance plans, FMEA, and mitigation closure for tester platforms, modules, interface hardware, burn-in, wafer/die sort, metrology, and supplier hardware.
  • Lead Installation Qualification, Module Operational Qualification, Measurement System Analysis, HVM and Transfer Qualification, Reliability Validation, Change Qualification, and production release reviews.
  • Ensure test processes achieve quality, yield, miscorrelation, gain, capability, stability, cost, and customer-risk objectives before transfer and during ramp.
  • Enable successful and timely transfer to ATM factories; provide effective IPG QRE support for engineering, qualification, pilot, and revenue production.
  • Own, define, and update Test Process Certification methods, specifications, critical success indicators, qualification templates, and release criteria.
  • Establish and maintain FMEA, Control Plans, MSA, SPC, OCAP, calibration, traceability, data integrity, change control, work instructions, and audit-ready evidence.
  • Lead MQE, excursion, yield, hardware, and reliability investigations using 8D, 5 Why, fault isolation, DOE, and model-based problem solving; verify corrective action effectiveness and recurrence prevention.
  • Use statistical analysis and manufacturing data to monitor process health, predict emerging risk, reduce escapes, improve qualification efficiency, and strengthen certification decisions.

Benefits

  • competitive pay
  • stock bonuses
  • health
  • retirement
  • vacation
© 2026 Teal Labs, Inc
Privacy PolicyTerms of Service