Software Development Engineer - GPU Interconnects and Ethernet AI

Advanced Micro Devices, Inc•Santa Clara, CA

About The Position

AMD is seeking an AI Networking Systems Software Engineer to design, develop, optimize, and bring up networking software for GPU scale-up interconnects and Ethernet-based AI fabrics. The role is a senior technical contributor on a core team working with GPU, NIC, switch, and rack-scale technology. The engineer will lead networking software work across driver, firmware, and systems software layers for AMD Helios rack-scale deployments, focusing on Ethernet-based scale-up GPU interconnect and scale-out networking. The role collaborates with silicon, hardware, firmware, driver, switch software, architecture, and external vendor teams to deliver high-performance, low-latency, resilient networking for AI infrastructure. It also includes technical leadership, design and code reviews, mentoring, system troubleshooting, performance analysis, and influencing future platform architecture.

Requirements

Strong C/C++ programming skills and attention to code quality.
Linux kernel driver development experience, including PCIe devices, DMA, interrupts, and memory management.
Embedded firmware development experience on microcontrollers or SoC management processors, including RTOS or bare-metal environments.
Strong knowledge of Ethernet, including MAC, PCS, FEC, SerDes, link training, auto-negotiation, and high-speed link bring-up.
Experience with GPU interconnect or scale-up fabric technologies such as UALink, Infinity Fabric/xGMI, NVLink, or Ethernet-based scale-up.
Strong Ethernet networking experience, including L2 switching and bridging, VLANs, MAC learning, LLDP, link aggregation, L3 forwarding, and QoS (PFC, ETS, ECN, buffer, and queue management).
Experience with datacenter switch software such as SONiC, SAI, or switch ASIC SDKs.
Experience with network protocols and transports such as RDMA, RoCE, InfiniBand, TCP/IP, or related high-performance transport technologies.
Familiarity with scale-up and scale-out architectures in AI or large distributed computing environments.
Experience debugging complex multi-node system issues involving hardware, firmware, drivers, switches, and application workloads.
Experience with performance analysis, profiling, tracing, and observability tools for system and network performance tuning.
Effective communication and problem-solving skills, with the ability to lead technical work across architecture, hardware, firmware, software, and validation teams.
Bachelor's or Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent.

Nice To Haves

Python or Go for tooling.
ASIC, GPU, NIC, or switch bring-up experience.
Knowledge of reliability, availability, and serviceability considerations in rack-scale or datacenter deployments.
Experience with software development processes and tools such as debuggers and source code control.
Years of experience in networking, systems software, driver, or firmware development.

Responsibilities

Lead the design and development of networking software for GPU scale-up interconnect and Ethernet-based AI fabrics on AMD Helios rack-scale systems.
Develop and optimize Linux kernel drivers, embedded firmware, and user-space software for GPU interconnect, NIC, and switch subsystems.
Drive hardware and software bring-up of new ASICs and platforms, including SerDes and link initialization, Ethernet MAC/PCS/FEC configuration, topology discovery, and validation.
Work with switch software teams on switch configuration, forwarding, QoS, telemetry, and fabric management for scale-up and scale-out topologies.
Define firmware, driver, and management interfaces and control-plane protocols between GPUs, switches, and fabric management software.
Analyze end-to-end network performance, latency, bandwidth utilization, congestion behavior, and communication efficiency across multi-node and rack-scale deployments.
Develop tools, diagnostics, and telemetry frameworks to monitor link and fabric health, identify bottlenecks, and accelerate root cause analysis.
Investigate and resolve issues across GPU interconnects, NICs, switches, transport layers, firmware, drivers, collective communication libraries, and distributed runtimes.
Contribute to resiliency, RAS, serviceability, and deployment-readiness features for large-scale clusters.
Support performance characterization of collective operations and distributed training and inference workloads over scale-up and scale-out fabrics.
Partner with internal and external teams, including switch and platform vendors, to validate interoperability and optimize AI workload performance on AMD platforms.
Help define software requirements and influence future GPU, interconnect, switch, and system architecture.
Provide technical leadership through design and code reviews, and mentor engineers across the team.