SoC UPF Methodology Engineer

Apple • San Diego, CA

4d

About The Position

Join the Low Power group at Silicon Technologies to develop capabilities for low-power chip design and contribute to next-generation chips. The role focuses on exploring AI/ML to shape future UPF workflows, refining the existing Unified Power Format (UPF) framework, and integrating and verifying it across mobile products.

The engineer will enhance UPF methodologies by refining power-intent specification, execution, and validation for advanced mobile SoCs. The work includes improving verification coverage, developing project-specific UPF solutions, overseeing deployment and sign-off in frontend and place-and-route stages, assessing power intent for custom circuitry, resolving workflow issues with design and verification teams, and applying AI/ML to optimize UPF processes.

Requirements

• Bachelor's degree in a relevant field.
• At least 10 years of relevant industry experience.

Nice To Haves

• Expertise in UPF implementation and verification.
• Proficiency in scripting languages such as Python and Tcl.
• Understanding of CMOS power design principles.
• Experience applying AI/ML to coding and workflow optimization.
• Knowledge of multi-voltage static verification tools, such as VSILP/VCLP and CLP.
• Familiarity with the complete RTL-to-GDSII design flow.
• Strong communication abilities for effective collaboration across multidisciplinary teams.

Responsibilities

• Enhance power-intent coverage using advanced static and dynamic verification techniques.
• Develop tailored UPF solutions to meet project-specific requirements.
• Oversee UPF deployment and sign-off for frontend (FE) and place-and-route (P&R) stages.
• Conduct power-intent assessments on custom circuitry.
• Collaborate with design and verification teams to troubleshoot and resolve UPF-related workflow challenges.
• Integrate AI/ML technologies to optimize UPF processes and methodologies.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior