SoC UPF Methodology Engineer

Apple • San Diego, CA

4d

About The Position

Join the Low Power group at Silicon Technologies to develop technology and capabilities for low-power chip design. The role contributes to Apple’s next-generation chips by exploring AI/ML for next-generation UPF workflows, refining the existing UPF framework, and ensuring its integration and rigorous verification across mobile products. The position is part of a silicon design group responsible for state-of-the-art ASICs and includes transistor-level power ERC sign-off and power intent-UPF implementation and verification on mobile SoCs.

The main objective is to enhance Unified Power Format (UPF) methodologies by refining power intent specification, execution, and validation to support state-of-the-art mobile SoCs. The role also develops tailored UPF solutions, oversees UPF deployment and sign-off across frontend and place-and-route stages, assesses power intent on custom circuitry, collaborates with design and verification teams to resolve workflow challenges, and integrates AI/ML technologies to optimize UPF processes and methodologies.

Requirements

• Bachelor’s degree in a relevant field.
• At least 3 years of relevant industry experience.

Nice To Haves

• Expertise in UPF implementation and verification.
• Proficiency in scripting languages such as Python and Tcl.
• Understanding of CMOS power design principles.
• Experience applying AI/ML to coding and workflow optimization.
• Knowledge of multi-voltage static verification tools such as VSILP/VCLP and CLP.
• Familiarity with the complete RTL-to-GDSII design flow.
• Strong communication abilities for effective collaboration across multidisciplinary teams.

Responsibilities

• Enhance power intent coverage using advanced static and dynamic verification techniques.
• Develop tailored UPF solutions to meet project-specific requirements.
• Oversee UPF deployment and sign-off for frontend (FE) and place-and-route (P&R) stages.
• Conduct power intent assessments on custom circuitry.
• Partner with design and verification teams to troubleshoot and resolve UPF-related workflow challenges.
• Integrate AI/ML technologies to optimize UPF processes and methodologies.
• Support transistor-level power ERC sign-off and power intent-UPF implementation and verification on mobile SoCs.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level