SOC Design Verification Engineer – Data Center Solutions

Qualcomm • San Diego, CA

2d • $115,600 - $173,400

About The Position

We are seeking highly motivated and experienced Design Verification Engineers to join our Data Center SoC Verification team. In this role, you will be responsible for verifying next-generation Data Center SoCs that power AI, high-performance computing, and cloud infrastructure products. You will work closely with architects, design engineers, software teams, and verification specialists to develop scalable verification solutions, drive verification closure, and ensure first-silicon success for complex SoC designs.
This position offers the opportunity to work on cutting-edge technologies including multi-core CPUs, cache coherency systems, memory subsystems, AI/ML accelerators, high-speed interconnects, security, and advanced SoC architecture.

Requirements

• Bachelor's or master's degree in electrical engineering, Computer Engineering, Computer Science, or related field.
• Minimum 2+ years of design verification experience
• Strong knowledge of: System Verilog, UVM, C, Assertion-Based Verification (SVA), Coverage-Driven Verification, System level Use case verification
• Experience developing verification environments from architecture/specification through signoff.
• Strong understanding of computer architecture and digital design fundamentals.
• Experience debugging complex SoC-level issues.
• Excellent communication and collaboration skills.
• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
• OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
• OR PhD in Science, Engineering, or related field.

Nice To Haves

• Experience with one or more of the following: CPU verification, Cache coherency protocols (ACE, CHI, CXL), DDR or HBM memory systems, PCIe, Ethernet, or networking protocols, AI/ML accelerator verification, Security and RAS feature verification, System Performance verification, System Power verification, ATE and Post Silicon bring up testing
• Experience with: Portable Stimulus (PSS), Formal Verification, Emulation platforms (Veloce/Palladium/ZeBu), Power-aware verification
• Proficiency in Python or scripting languages for automation.
• AI-assisted verification of workflows and test generation.
• Experience in full-chip or subsystem verification environments.

Responsibilities

• Develop and execute comprehensive verification plans for SoC, subsystem, and IP-level features.
• Design and implement scalable System Verilog/UVM-based and Processor-based verification environments.
• Create directed and constrained-random test scenarios to validate functionality and architectural use cases.
• Develop assertions, functional coverage models, and checkers.
• Debug RTL, testbench, and integration issues and work closely with design teams to resolve defects.
• Drive coverage closure using functional and code coverage metrics.
• Participate in architecture and design reviews to ensure verification requirements are incorporated early in the development cycle.
• Verify complex Data Center SoC features including: Multi-core CPU systems, Cache coherency and interconnect fabrics, DDR/HBM memory subsystems, PCIe, CXL, Ethernet, and high-speed interfaces, Security, RAS, and power-management features.
• Support emulation and acceleration-based verification when required.
• Contribute to methodology improvements, automation, reusable verification components, and AI-assisted verification flows.

Benefits

• Competitive annual discretionary bonus program
• Opportunity for annual RSU grants
• Highly competitive benefits package designed to support your success at work, at home, and at play.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior