SOC Design Verification Lead

Advanced Micro Devices, Inc•Boxborough, MA

13h•Hybrid

About The Position

We are seeking a seasoned SoC DV Lead and Infrastructure Architect with expertise or significant interest in DV infrastructure, methodology and testbench architecture. You have had significant success driving architecture, AI initiatives, product execution and product requirements. You would be accountable driving schedule and managing cost. This senior role will stretch you as you lead architecture teams in new directions, network with our world-class, patent-holding think-tank, and negotiate amongst design teams, marketing, and business unit executives.

Requirements

Excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc.
Highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you.
Multiple years of experience of project execution and design verification strategy
Outstanding foundation in Systems & SoC architecture, with expertise in one or more of the following: CPU or GPU, Memory sub-system, Fabrics, CPU/GPU coherency, Multimedia, I/O subsystems, Clocks, Resets, Virtualization and Security
Experience analyzing dv infrastructure backbone problems and vendor tools
Demonstrated expertise in testbench architecture and verification methodology
UVM, C++, System Verilog and other programming languages
Github copilot, Cursor
Excellent communication, management, and presentation skills
Adept at collaboration among top-thinkers and senior architects with strong interpersonal skills to work across teams in different geographies

Responsibilities

Define testbench architecture to support product micro-architecture requirements, drive technical verification specifications for SoC and IP blocks to meet those requirements, and provide technical direction to execution teams
Comprehend the SOC as a complete system which includes HW (Silicon), FW, to align the modelling for design verification
Work cross functionally with IP/Domain architects to identify and assess complex technical issues/risks and develop architectural solutions to achieve product requirements
Knowledge sharing and other contributions to design automation
As an overall dv lead, responsible for architecture analysis and technical solutions for issues/feature change requests and provide risk mitigation
Support Post-Si teams, DFT teams and Performance teams