Simulator & Debug Tools Lead

Normal Computing Corporation • Palo Alto, CA

4d

About The Position

Normal Computing is hiring a Simulator & Debug Tools Lead to own the hardware simulator and the debugging and profiling tools integrated with its compiler. Normal’s hardware performs memory-bound large-model inference inside memory, and the software needed to program it has no standard off-the-shelf simulator. The role will build and maintain the simulator that compiler and hardware teams use to validate their work before silicon exists.

This is a hands-on technical leadership position balancing simulator fidelity, performance, and tooling investment. The lead will make decisions about those tradeoffs and ensure teams have a dependable view of what the chip can do. Normal Computing works across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul; the posting does not specify this role’s work location or workplace arrangement.

Requirements

• Experience building or leading development of hardware simulators, cycle-accurate or functional, for ASICs or novel compute architectures.
• Experience building debuggers, tracers, or profilers adopted by other engineers.
• Systems and compiler context sufficient to simulate both the software stack running on the hardware and the hardware itself.
• Comfort working with evolving hardware and adapting the simulator as the hardware changes.
• Fluency in C++ or Rust for simulator performance.
• Familiarity with Python for tooling.

Nice To Haves

• Experience with in-memory compute or other non-von-Neumann architectures.
• Experience building simulators used directly for architectural or compiler decisions, beyond post-hoc validation.
• Experience with open-source simulation, tracing, or hardware-tooling communities.
• Background spanning pre-silicon simulation and post-silicon bring-up.

Responsibilities

• Own the architecture and roadmap of the hardware simulator, including its accuracy, performance, and coverage of new hardware features.
• Ensure the simulator’s behavior, state, and memory semantics are reliable enough for compiler and runtime engineers to use.
• Build debuggers, tracers, and profilers that help engineers find and fix bugs.
• Work with Design Verification and bring-up teams to correlate the simulator with RTL, FPGA prototypes, and eventually silicon, and investigate discrepancies.
• Build simulator benchmarks and traces from LLM inference workloads to measure fidelity against the chip’s intended workloads.
• Decide how to balance simulator fidelity, speed, and tooling investment, and explain those tradeoffs to compiler and hardware teams.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Education Level: No Education Listed