Silicon Photonics PIC Design Engineer

BroadcomSan Jose, CA
8d

About The Position

Broadcom is seeking a Senior Silicon Photonics PIC Design Engineer to support the development of next-generation photonic integrated circuits (PICs). The successful candidate will lead the design, simulation, layout, characterization, and system-level verification of advanced silicon photonics components and circuits, contributing to high-performance optical interconnect solutions.

Requirements

  • Strong proficiency in photonic design and simulation tools such as Ansys/Lumerical and Cadence Virtuoso.
  • Extensive experience in RF/Signal Integrity (SI) simulation and optimization for High-speed modulators and photodetectors (PDs), Electrical subsystems including PCB, TIA, and driver circuits, and Integrated optical components and full transceiver systems
  • Hands-on experience designing high-speed active optical devices, including MZM and MRM
  • Hands-on experience with passive optical components, including couplers, splitters, PSR, and WDM components.
  • Proficiency in programming for data analysis, modeling, and layout automation (e.g., Python, scripting tools).
  • Strong analytical thinking, problem-solving ability, and cross-functional collaboration skills.
  • Master’s degree in Physics, Electrical Engineering, Optics, or related field with 10+ years of relevant experience OR PhD in Physics, Electrical Engineering, Optics, or related field with 7+ years of relevant experience

Responsibilities

  • Utilize industry-standard simulation tools, including Ansys/Lumerical and the Cadence Virtuoso design environment, to design and validate photonic components and integrated circuits.
  • Collaborate closely with design and layout engineers to develop high-performance integrated photonic circuits.
  • Partner with fabrication and process engineers to define, optimize, and monitor device designs, including implementation of process control and monitoring structures.
  • Develop test and qualification plans in coordination with validation and quality engineering teams.
  • Validate link- and system-level performance in collaboration with EIC designers, packaging engineers, and system architects.

Benefits

  • Medical, dental and vision plans
  • 401(K) participation including company matching
  • Employee Stock Purchase Program (ESPP)
  • Employee Assistance Program (EAP)
  • company paid holidays
  • paid sick leave and vacation time
  • The company follows all applicable laws for Paid Family Leave and other leaves of absence.
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