Silicon Engineering Technical Lead
About The Position
The Silicon Engineering Technical Lead joins a team integrating new silicon architecture and supporting new product development through volume production. The team performs manufacturing test validation and system deployment for next-generation high-speed networking products, working across ASIC, optics, hardware, firmware, and manufacturing teams. The role conducts root-cause analysis from system-level failures down to silicon behavior and develops silicon validation and characterization for functional coverage, performance, stress, corner-case, and interoperability testing. It establishes silicon performance margins and operating limits and correlates silicon characterization data with system-level behavior. The position also supports manufacturing failure analysis and containment of silicon, considering failures involving ASIC, SerDes, substrate, packaging, thermal, firmware/SDK, and optics subsystems. The technical lead influences test coverage through ATE, wafer-level, and package-level testing and works with ASIC design teams, system architects, manufacturing operations, and network systems design.
Requirements
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
- 5 years of experience in silicon engineering, ASIC validation, or a related technical domain.
- Experience with silicon architecture and performance characterization.
- Knowledge of signal integrity and high-speed SerDes.
- Experience conducting root-cause analysis from system-level failures to silicon behavior.
- Experience with Design for Testability (DFT), scan, MBIST, LBIST, boundary scan/JTAG, and production test methodologies.
Nice To Haves
- Master's degree in Electrical Engineering, Computer Engineering, or a related field.
- Experience with automated test equipment (ATE), wafer-level testing, and package-level testing.
- Experience correlating silicon characterization data with system-level behavior.
- Experience with early silicon bring-up characterization.
- Experience collaborating with cross-functional teams including ASIC, optics, hardware, firmware, and manufacturing.
- Excellent communication skills for working with stakeholders.
Responsibilities
- Conduct root-cause analysis from system-level failures down to silicon behavior.
- Develop silicon validation and characterization for functional coverage, performance, stress, corner-case, and interoperability testing.
- Establish silicon performance margins and operating limits.
- Correlate silicon characterization data with system-level behavior.
- Support manufacturing failure analysis and containment of silicon, including failures involving ASIC, SerDes, substrate, packaging, thermal, firmware/SDK, and optics subsystems.
- Influence test coverage through ATE, wafer-level, and package-level testing.
- Work with ASIC design teams, system architects, manufacturing operations, and network systems design.
Benefits
- Medical insurance
- Dental insurance
- Vision insurance
- 401(k) plan with Cisco matching contribution
- Paid parental leave
- Short- and long-term disability coverage
- Basic life insurance
- Paid holidays
- Floating holiday for non-exempt employees
- Paid day off for employee's birthday
- Paid year-end holiday shutdown
- Personal wellness days
- Paid vacation or flexible vacation time off, depending on employee classification
- Sick time off
- Additional paid time away may be requested for critical or emergency family issues
- Optional paid volunteer days
- Annual bonuses may be available for non-sales roles
- Performance-based incentive pay for employees on sales plans
- Employees may be eligible for Cisco restricted stock unit grants
Stand Out From the Crowd
Upload your resume and get instant feedback on how well it matches this job.
What This Job Offers
Job Type
Full-time
Career Level
Senior
