Silicon Engineering Technical Lead
About The Position
Join a team that integrates new silicon architecture, supports new product development through volume production, performs manufacturing test validation, and deploys systems for next-generation high-speed networking products. The team collaborates across ASIC, optics, hardware, firmware, and manufacturing. As Silicon Engineering Technical Lead, you will conduct root-cause analysis from system-level failures down to silicon behavior; develop silicon validation and characterization covering functional, performance, stress, corner-case, and interoperability testing; establish silicon performance margins and operating limits; and correlate silicon characterization data with system-level behavior. You will support manufacturing failure analysis and containment for silicon-related failures originating from subsystems such as ASIC, SerDes, substrate, packaging, thermal, firmware/SDK, and optics. You will also influence test coverage through ATE, wafer-level, and package-level testing, working with ASIC design teams, system architects, manufacturing operations, and network systems design.
Requirements
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
- 5 years of experience in silicon engineering, ASIC validation, or a related technical domain.
- Experience with silicon architecture and performance characterization.
- Knowledge of signal integrity and high-speed SerDes.
- Experience conducting root-cause analysis from system-level failures to silicon behavior.
- Experience with Design for Testability (DFT), scan, MBIST, LBIST, boundary scan/JTAG, and production test methodologies.
Nice To Haves
- Master's degree in Electrical Engineering, Computer Engineering, or a related field.
- Experience with automated test equipment (ATE), wafer-level testing, and package-level testing.
- Experience correlating silicon characterization data with system-level behavior.
- Experience with early silicon bring-up characterization.
- Experience collaborating with cross-functional teams including ASIC, optics, hardware, firmware, and manufacturing.
- Excellent communication skills for working with stakeholders.
Responsibilities
- Conduct root-cause analysis from system-level failures down to silicon behavior.
- Develop silicon validation and characterization for functional coverage, performance, stress, corner-case, and interoperability testing.
- Establish silicon performance margins and operating limits.
- Correlate silicon characterization data with system-level behavior.
- Support manufacturing failure analysis and containment of silicon-related failures, including failures originating from ASIC, SerDes, substrate, packaging, thermal, firmware/SDK, and optics subsystems.
- Influence test coverage through ATE, wafer-level, and package-level testing.
- Work with ASIC design teams, system architects, manufacturing operations, and network systems design.
Benefits
- Medical, dental, and vision insurance.
- 401(k) plan with a Cisco matching contribution.
- Paid parental leave.
- Short- and long-term disability coverage.
- Basic life insurance.
- Cisco restricted stock unit grants may be available, subject to eligibility and continued-employment vesting conditions.
- Paid holidays and a floating holiday for non-exempt employees.
- Paid birthday day off, year-end holiday shutdown, and personal wellness days.
- Paid vacation or flexible vacation time off, depending on employee classification.
- Paid sick time and sick-time carryover.
- Additional paid time away may be requested for critical or emergency family issues.
- Optional paid volunteer days.
- Annual bonuses for eligible non-sales roles.
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What This Job Offers
Job Type
Full-time
Career Level
Senior
