Silicon Architecture Graduate Intern

Intel•Hillsboro, CA

2d•Onsite

About The Position

Contributes to the definition and architecture of silicon solutions including hardware, firmware, and platform specifications based on requirements, features, and integration of hardware and software. May assist in modeling and simulation to analyze performance, power, and feature trade offs across interconnected subsystems to guide architectural decisions and ensure alignment with product goals. Collaborates with architects, design engineers, and validation teams to support early-stage feasibility and specification development. As an intern, learns and applies knowledge, builds skills, and explores future career opportunities through hands-on experience and projects that support Intel business goals in a collaborative environment.

Requirements

Currently enrolled in a master’s degree in computer science or computer engineering with computer architecture knowledge, including graduate level coursework and a major class project or thesis relevant to computer architecture or equivalent work experience OR Currently enrolled in a PhD in Computer Science or Computer Engineering with computer architecture knowledge, including graduate level coursework and a major class project or thesis relevant to computer architecture or equivalent work experience
Programming in C/C++
High-level modeling of CPU cores, core components (e.g. caches), or systems
Assembly language programming, code generation, or other low-level software experience.

Nice To Haves

Research publications demonstrating contributions to the field of computer architecture
Broad exposure to computer architecture literature through coursework, conferences, peer reviews, reading groups, etc.
Knowledge of x86 architecture
Familiarity with compiler internals and low-level software optimization

Responsibilities

Work on new performance ISA evaluation and performance analysis, including: Running of benchmarks compiled with prototype compilers on silicon and performance simulators utilizing tracing techniques
Analysis of instruction breakdowns and patterns using existing and newly developed tools
Performance analysis of new experimental ISA features, regression analysis, and debugging