Senior System Verification Engineer

NVIDIA•Austin, TX

2d•$200,000 - $322,000

About The Position

NVIDIA is seeking a highly motivated engineer to join its platform verification team and help deliver the next generation of NVIDIA servers. The role applies RTL verification knowledge to develop and implement verification strategies that support outstanding functionality, performance, and quality in NVIDIA’s DGX server platforms. The engineer will define design processes, tool flows, and verification approaches for board and system designs; develop board- and system-level RTL and digital and analog simulation methodologies; create simulation models for board-level digital and mixed-signal components; and perform pre-silicon verification of PCB designs. The role also collaborates with architecture, ASIC, FPGA, software, and system design teams to develop end-to-end pre-Gerber-out verification environments.

Requirements

BS or MS in Electrical or Computer Engineering, or equivalent experience.
At least 12 years of proven experience in mixed-signal simulation or PCB design.
Software programming skills in Python.
Mixed-signal or SPICE simulation experience.
Verilog RTL development and simulation experience.
Excellent verbal, written, and presentation communication skills, organizational capabilities, and collaborative interpersonal skills.

Nice To Haves

Background in system validation.
Background in SoC mixed-signal simulation, such as PrimeSim or similar.
Knowledge of system design flows and methods.

Responsibilities

Define design processes, tool flows, and verification approaches to deliver bug-free board and system designs.
Develop board- and system-level RTL designs and digital and analog simulation methodologies.
Develop simulation models for board-level digital and mixed-signal components.
Perform pre-silicon verification of PCB designs, including connectivity, design-rule, and timing checks.
Collaborate with architecture, ASIC, FPGA, software, and system design teams to develop end-to-end pre-Gerber-out verification environments.