Senior Staff Engineer, Advanced Packaging Technology Development (TD)

Marvell Technology•Chandler, AZ

20h•$142,700 - $211,230

About The Position

The Advanced Packaging Technology Development (TD) team is responsible for developing, integrating, and maturing advanced packaging technologies to enable next-generation High Performance Computing (HPC), Artificial Intelligence (AI), and networking products. This role focuses on bringing emerging packaging technologies to production readiness, ensuring they meet system-level electrical, mechanical, thermal, and reliability requirements. The TD team works at the intersection of design, materials, and manufacturing to translate architectural requirements into manufacturable and scalable package solutions, including 2.5D/3D integration, chiplet-based architectures, co-packaged optics (CPO), and advanced substrates. The role requires strong collaboration with internal design teams and external ecosystem partners to close technology gaps, optimize integration, and enable high-volume manufacturing (HVM).

Requirements

Deep expertise in advanced packaging technologies, including: 2.5D/3D integration, chiplets, interposers, and advanced substrates
Materials, process integration, and manufacturability
Reliability (component and board level), warpage, and thermal management
Strong foundation in electrical engineering: Signal integrity (SI), power integrity (PI), and electromagnetic behavior
Experience with high-speed interfaces and complex PDNs
Proven experience in technology development and productization, not just design or research
Bachelor’s degree with 10+ years of experience, or Master’s / PhD with 8+ years of experience in relevant fields

Responsibilities

Develop and mature advanced packaging technologies from concept to production-ready solutions.
Drive integration of new technologies into product platforms, ensuring alignment with system requirements and manufacturing constraints.
Define and implement package architectures including chiplet topology, interconnect strategy, interposer/substrate design, and power delivery networks.
Lead co-design across silicon, package, and system to optimize performance, power, and area.
Establish and refine design rules, stack-ups, and integration guidelines for advanced packaging technologies.
Drive scaling of interconnect density, substrate capability, and PDN performance.
Work closely with OSATs, foundries, and substrate suppliers to ensure process capability, yield, and cost targets are met.
Drive resolution of manufacturability challenges and ensure smooth ramp to HVM.
Lead development of test vehicles and engineering builds to validate technology readiness.
Drive package qualification, reliability validation, and failure analysis.
Lead cross-functional efforts across design, product engineering, and supply chain to ensure successful technology deployment.
Influence supplier roadmaps to align with product and technology needs.