About The Position

The Texas Institute for Electronics (TIE), a University of Texas at Austin-supported semiconductor consortium, develops advanced 3D heterogeneous integration manufacturing technology and provides pilot manufacturing capabilities to address national security needs and support domestic economic growth. TIE works across advanced packaging and other semiconductor domains, including logic, memory, heterogeneous integration, and chip cooling. The Advanced Packaging Materials Engineer develops new formulations and evaluates existing materials for advanced packaging products. The role works with process development teams, other internal groups, and external vendors to identify and create material candidates and material-based solutions, and develops testing and characterization plans for internally developed and externally acquired materials. The position may be filled at the Senior Engineer level or higher, depending on experience and qualifications. The position is based on-site in a scientific research and prototyping facility, with changing work conditions and collaboration with multiple partners and customers. Work outside standard office hours may occasionally be required during peak periods and special events. The stated schedule is Monday through Friday; the posting does not specify exact daily hours.

Requirements

  • Bachelor’s degree in Polymer Science, Materials Science and Engineering, or a closely related engineering discipline, plus two years of experience in the semiconductor packaging industry or a closely related industry for the Senior Engineer level; alternatively, a master’s degree or higher in one of these fields.
  • For the Staff Engineer level: a bachelor’s degree in a relevant field plus five years of related industry experience; or a master’s degree in a relevant field plus three years of related industry experience; or a Ph.D. or higher in a relevant field.
  • Experience in the semiconductor packaging industry or a closely related industry.
  • Hands-on experience in semiconductor packaging materials development, process integration, or related manufacturing technologies, with understanding of industry requirements and technical challenges.
  • Strong understanding of advanced semiconductor packaging architectures and technologies, including 2.5D/3D integration, heterogeneous integration, chiplets, wafer-level packaging, and hybrid bonding.
  • In-depth knowledge of polymer chemistry, structure-property relationships, adhesion mechanisms, interfacial science, thermal and mechanical properties, and material reliability.
  • Proficiency in materials characterization and analytical techniques such as DSC, TGA, DMA, FTIR, and TMA, as well as mechanical testing; ability to interpret results and establish material-performance relationships.
  • Ability to independently design and execute experiments, apply DOE methodologies, troubleshoot complex technical challenges, and translate research findings into practical engineering solutions.
  • Relevant education and experience may be substituted as appropriate.

Nice To Haves

  • Ph.D. in Polymer Science, Materials Science and Engineering, or a closely related engineering discipline.
  • Three or more years of experience in the semiconductor packaging industry or a closely related industry.
  • Two or more years of experience working on Temporary Bonding and Debonding (TBDB) materials and processes.
  • Experience in a startup or research and development (R&D) environment.

Responsibilities

  • Drive material formulation, characterization, and process optimization using structured Design of Experiments (DOE), data analysis, and root-cause investigations.
  • Design and execute experiments evaluating material properties, process performance, reliability, and compatibility with advanced packaging technologies, including 2.5D/3D integration, heterogeneous and mixed-material integration, and hybrid bonding.
  • Lead material qualification and performance validation, including qualification of innovative material solutions for advanced semiconductor packaging.
  • Collaborate with process engineering, equipment development, manufacturing, and external partners to integrate new materials into semiconductor packaging processes.
  • Serve as a technical subject matter expert and engage with customers, suppliers, and industry partners to translate technical requirements into material specifications, development roadmaps, and commercially viable solutions.
  • Work effectively in a team, mentor junior engineers and students, and communicate effectively.
  • Perform other duties as assigned.

Benefits

  • Competitive health benefits, with employee premiums covered at 100% and family premiums at 50%.
  • Voluntary vision, dental, life, and disability insurance options.
  • Generous paid vacation, sick time, and holidays.
  • Teachers Retirement System of Texas defined-benefit retirement plan with 8.25% employer matching funds.
  • Additional voluntary retirement programs: Tax Sheltered Annuity 403(b) and Deferred Compensation program 457(b).
  • Flexible spending account options for medical and childcare expenses.
  • Free training access through LinkedIn Learning and professional conference opportunities.
  • Tuition assistance.
  • Employee discount program, including athletic tickets.
  • Free access to UT Austin libraries and museums with staff ID card.
  • Free rides on UT Shuttle and Austin CapMetro buses with staff ID card.
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