Senior Software Engineer, SOC Design Methodology

NVIDIA•Us, CA

18d•Hybrid

About The Position

Our team develops the software that powers how NVIDIA's ASIC engineers design chips — building tools, automating flows, and co-developing with EDA vendors to push design methodology toward Speed of Light. We're a cross-functional team working across SoC design, RTL, and build infrastructure, and we're looking for an engineer who understands chip design well enough to know what's slowing it down — and can build the tools to fix it.

Requirements

BS or MS in Electrical Engineering, Computer Engineering, or Computer Science (or equivalent experience).
3+ years of EDA tool development experience in the ASIC or SoC design field.
Hands-on experience with ASIC or SoC design and verification.
Proficiency in Verilog or SystemVerilog.
Strong programming skills in C++, Python, Perl, or Tcl.
Solid understanding of computer algorithms and data structures.

Nice To Haves

Experience with SoC integration — IP connectivity, clock/reset automation, or top-level design flow.
Familiarity with Synopsys Fusion Compiler or similar next-generation design tools.
Hands-on use of agentic AI coding tools (Claude Code, Cursor, Copilot) in day-to-day development.

Responsibilities

Developing software to automate SoC design and build flows, enabling ASIC engineers to work faster and more reliably.
Building new methodologies and tools in pursuit of ASIC design at Speed of Light (SOL).
Partnering with design and verification engineers to support project execution and identify workflow gaps.
Co-developing EDA tool capabilities with vendors to best serve NVIDIA's SOL needs.