Senior RF Test & PCB Design Engineer

Saige PartnersSan Jose, CA

About The Position

This is a W2 contract position and is not eligible for C2C or W2 referral candidates. The role involves leading PCB development, simulation, hardware bring-up, RF characterization, and cross-functional collaboration. The engineer will also be responsible for documentation and data analysis.

Requirements

  • BS or MS in Electrical Engineering or a related technical field.
  • 5+ years of hands-on experience in RF PCB design and hardware development.
  • Expert-level proficiency in Cadence Allegro/OrCAD and Ansys HFSS (or equivalent EM simulation tools).
  • Strong knowledge of RF theory, including S-parameters, transmission line theory, matching networks, and de-embedding techniques.
  • Extensive experience with RF test equipment (VNAs, Spectrum Analyzers, Oscilloscopes) and high-speed probing techniques.
  • Deep understanding of PCB stack-ups, dielectric materials (e.g., Rogers, Megtron), and manufacturing constraints for high-frequency PCB designs.

Nice To Haves

  • Proficiency in Python or C# for developing automated test suites to increase characterization throughput.
  • Experience applying AI/ML models for predictive maintenance of test setups or for signal classification.
  • Experience with manual or semi-automated RF probe stations for on-wafer die characterization.

Responsibilities

  • Lead the schematic entry, component selection, and layout routing optimization for complex RF evaluation boards using Cadence Allegro.
  • Perform Signal Integrity (SI) and Power Integrity (PI) simulations.
  • Utilize Ansys HFSS for EM modeling and impedance matching to ensure optimal RF performance.
  • Own the board bring-up process, including debugging hardware issues and validating performance against design specifications.
  • Utilize lab equipment (VNAs, Spectrum Analyzers, Signal Generators) to perform various RF measurements and verify simulation-to-measurement correlations.
  • Implement Machine Learning (ML) techniques to analyze large datasets and identify performance trends or anomalies.
  • Work closely with RFIC Design and System Engineering teams to define board requirements and provide feedback on chip-level performance.
  • Maintain detailed design documentations and test reports for internal and external stakeholders.
  • Collect, review and analyze test data.

Benefits

  • benefit package
  • convenient weekly payment solutions
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