Senior Quantum Engineer

Microsoft•Redmond, WA
•$119,800 - $261,000

About The Position

The Quantum Design team at Microsoft is seeking a Senior Quantum Engineer to design and simulate next-generation quantum processing unit (QPU) chips, advancing scalable quantum computing based on topological qubits. The role designs chip components, including wiring and interfaces that integrate with control and readout layers, and collaborates with experts in systems design, fabrication, packaging, and control. The engineer uses simulation-driven, fabrication-aware workflows to develop QPU chip designs and interfaces, performs RF simulations to define design requirements and optimize control and readout performance, and builds and maintains design tools and device models to enable co-design with internal teams and external partners. The position also applies integrated circuit design principles and engineering best practices to improve design processes. Microsoft’s Quantum team works on topological qubits for large-scale quantum computing and collaborates with companies advancing quantum computer systems across the stack. The role emphasizes clear communication, interdisciplinary collaboration, and working in an AI-first environment to advance quantum computing.

Requirements

  • Master’s degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or a related field and 3+ years of technical engineering experience; or a bachelor’s degree in one of these fields and 5+ years of technical engineering experience; or equivalent experience.
  • Ability to meet Microsoft, customer, and/or government security screening requirements, including passing the Microsoft Cloud Background Check upon hire or transfer and every two years thereafter.
  • Provide citizenship or qualifying status documentation for export-control eligibility; citizenship will be verified with a valid passport, with other applicable documents accepted for lawful permanent residents, refugees, and asylees.
  • Clear communication and effective interdisciplinary collaboration.
  • Experience in quantum device design and RF simulation, familiarity with integrated circuit design workflows and tool development, and a passion for advancing quantum computing.

Nice To Haves

  • Doctorate in Electrical Engineering, Computer Engineering, Mechanical Engineering, or a related field and 3+ years of technical engineering experience; or a master’s degree in one of these fields and 6+ years; or a bachelor’s degree and 8+ years; or equivalent experience.
  • 3+ years of chip or PCB design experience involving quantum devices, mixed-signal integrated circuits, high-speed RF/digital circuits, or equivalent relevant experience.
  • Proficiency with industry-standard or custom chip and circuit design tools, including EDA tools for IC and ASIC design, physical design, and verification.
  • Experience with RF circuit and electromagnetic simulation for device, chip, and interconnect modeling and optimization using tools such as Ansys, Sigrity, COMSOL, Cadence, or SPICE-based simulators.
  • Experience with device and chip thermal modeling, preferably in quantum or cryogenic operating regimes, using Ansys, COMSOL, or custom modeling packages.
  • Experience with semiconductor device design and fabrication processes, including PDKs, along with Python programming and collaborative development using Git/GitHub.
  • Knowledge of quantum computing principles and hands-on quantum hardware experience, such as superconducting-qubit or spin-qubit systems.
  • Ability to work in an AI-first environment using modern AI tools to accelerate discovery through hardware and software development.
  • Experience designing and building AI agents or copilots to assist with experiment setup, log triage, measurement report generation, protocol templating, and knowledge retrieval.

Responsibilities

  • Develop QPU chip designs and interfaces to readout and control layers using simulation-driven, fabrication-aware workflows.
  • Perform RF simulations of QPU chips and interface layers to define design requirements and optimize control and readout performance.
  • Partner with fabrication, systems, packaging, and control teams to co-design QPUs, incorporating constraints and requirements.
  • Build and maintain design tools, functionalize devices into models, and enable co-design with internal teams and external partners.
  • Apply integrated circuit design principles and engineering best practices to improve design processes and recommend optimizations.
  • Embody Microsoft’s Culture and Values.
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