As a Senior Engineer for AMD Vivado™ Design Tools, you will serve as the technical owner for verification methodology and simulation technologies, with a primary focus on UVM, SystemVerilog, HDL simulation, and technical product strategy. You will lead the evolution of Vivado's simulation ecosystem, helping customers develop, verify, and deploy complex FPGA and adaptive SoC designs with industry-leading methodologies and tools. In this highly visible role, you will bridge engineering, product planning, and technical marketing by defining product direction, influencing verification methodologies, and representing AMD to strategic customers and industry partners. You will own the roadmap for UVM-based verification flows, HDL simulation (VHDL, Verilog, and SystemVerilog), Vivado Simulator capabilities, RTL encryption/IP protection, and deployment technologies including installation, licensing, and software delivery. Working closely with R&D, Applications Engineering, Sales, and key customers, you will translate real-world verification challenges into product innovations that improve productivity, interoperability, and customer success. We operate with an AI-first engineering mindset and encourage the use of AI agents and copilots to accelerate product development, customer enablement, and engineering workflows.
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Job Type
Full-time
Career Level
Senior