Senior Principal Optical Integration Engineer

Coherent Corp.Fremont, CA
$166,313 - $230,125Onsite

About The Position

This position is responsible for driving Co-Packaged Optics and Optical Engine product packaging activities from initial concept to production. The role involves developing the co-design process flow for Silicon Photonic (PIC) and electronics IC (EIC), including their IO pad frame and 3D interposer floor plan. The engineer will lead the schematic and layout design process for PIC and EIC interconnects, and work with OSATs to define packaging design rules, process flow, and material sets. A key aspect of the role is leading optical package development to ensure manufacturability and reliability, and collaborating with cross-functional teams such as laser packaging, Silicon Photonics, IC design, substrate layout, and module design.

Requirements

  • MS/PhD in an engineering or science discipline plus 5+ years of relevant experience
  • Experience with semiconductor laser design and silicon photonics.
  • Experience with New Product Introduction (NPI) and/or Product Lifecycle Management processes
  • Experience of managing cross-functional teams successfully, interacting with a broad range of functions, skills, cultures, and personalities.
  • Previous experience as an engineer in laser and silicon photonics R&D.
  • In-depth understanding of all aspects of Silicon Photonics.
  • Familiarity of high speed modulation in Silicon photonics including MZM, MRM, EAM at 200G and 400G.
  • Strong problem solving, critical thinking, and risk management skills.
  • Strong communication, planning, and organizational skills.
  • Highly self-motivated with a strong multi-disciplinary background is essential.

Nice To Haves

  • Experience with CPO, optical transceivers or components desirable.

Responsibilities

  • Drive Co-Packaged Optics and Optical Engine product packaging activities from initial concept to production.
  • Develop Silicon Photonic (PIC) and electronics IC (EIC) co-design process flow, PIC and EIC IO pad frame and 3D interposer floor plan.
  • Lead PIC and EIC interconnect schematic and monitor layout design process.
  • Work with OSAT’s to define PIC and EIC hybrid integration packaging design rules, process flow, and material sets.
  • Lead optical package development to establish package manufacturability and reliability.
  • Collaborate with cross-functional teams consisting of laser packaging, Silicon Photonics, IC design, substrate layout, and module design teams.

Benefits

  • competitive compensation program
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