This position is responsible for driving Co-Packaged Optics and Optical Engine product packaging activities from initial concept to production. The role involves developing the co-design process flow for Silicon Photonic (PIC) and electronics IC (EIC), including their IO pad frame and 3D interposer floor plan. The engineer will lead the schematic and layout design process for PIC and EIC interconnects, and work with OSATs to define packaging design rules, process flow, and material sets. A key aspect of the role is leading optical package development to ensure manufacturability and reliability, and collaborating with cross-functional teams such as laser packaging, Silicon Photonics, IC design, substrate layout, and module design.
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Job Type
Full-time
Career Level
Senior