Senior Principal Engineer

Renesas Electronics•San Jose, CA

About The Position

Renesas is seeking a Power Design Engineer to lead development of test vehicles for its high-current BCD (Bipolar-CMOS-DMOS) and low-voltage GaN power process and product portfolios. The role owns test vehicle definition, circuit and layout design, and characterization planning from concept through silicon bring-up. It works closely with process development, product engineering, applications, reliability, and test teams. The position calls for hands-on experience designing power devices and circuits at both IC and module level, along with familiarity with the power topologies the test vehicles are intended to support.

Requirements

Bachelor's or Master's degree in Electrical Engineering, Microelectronics, or a related field.
At least 10 years of hands-on design experience in power semiconductor devices, analog/power ICs, or power electronics.
Strong working knowledge of power conversion topologies, including buck, boost, multiphase/interleaved converters, half-bridge, and DrMOS/Intelli-Phase-style architectures, and how topology choices drive device requirements.
Solid understanding of power device physics and tradeoffs across BCD process technologies and GaN, particularly low-voltage GaN HEMTs, including RDS(ON), switching loss, gate charge, breakdown/avalanche behavior, and thermal characteristics.
Demonstrated experience designing test structures or test chips/vehicles for process technology development, including defining what a process node needs to prove.
IC-level design and layout experience, including parasitic-sensitive layout practices for high-current switching nodes.
Experience taking designs beyond the die level to module, package, or board level, such as power module co-design, evaluation board layout, or thermal/electrical co-design.
Proficiency with SPICE or equivalent circuit simulation tools and familiarity with device/TCAD simulation concepts.
Ability to interpret and specify absolute maximum ratings, transient voltage tolerance, and protection thresholds (OVP/UVP/OCP/OTP) relevant to power stage reliability.
Strong laboratory skills in bring-up, debugging, and characterization using oscilloscopes, curve tracers, power analyzers, and thermal imaging.

Responsibilities

Define, design, and drive execution of test vehicles for high-current BCD and low-voltage GaN process technologies, including device test structures, scaled power stages, and full-function demonstration circuits.
Translate process capability targets and product roadmap requirements into test vehicle architectures and specifications.
Design and simulate power stage circuits, such as synchronous buck/boost, multiphase, half-bridge/DrMOS, and gate drivers, to validate device performance under realistic switching and thermal conditions.
Select and characterize LDMOS, trench MOSFET, low-voltage GaN HEMT, Schottky, and synchronous rectifier devices for test structures, coordinating with device and process engineering on layout-dependent tradeoffs.
Perform IC-level layout and design for test structures, using parasitic-aware layout for switch nodes, current sensing, and gate drive paths.
Extend designs to module and package levels as needed, including co-design of power stages with packaging, magnetics, and PCB layouts for evaluation boards and system-level test vehicles.
Develop characterization plans covering DC parametrics, switching performance, efficiency, transient response, and voltage/current stress margins, including switch-node ringing and absolute-maximum validation.
Lead or support silicon bring-up, debugging, and correlation of measured results against simulations and design targets.
Collaborate with process integration, reliability, product/applications engineering, and test engineering to connect process split data to product-ready specifications.
Document design methodology, test vehicle results, and characterization data to support technology qualification and product development decisions.