Senior Physical Design Engineer

Microsoft•Redmond, WA
•$119,800 - $261,000

About The Position

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) supports Microsoft’s cloud infrastructure and online services. Within SCHIE, the Compute Silicon & Manufacturing Engineering (CSME) organization designs, develops, manufactures, and packages Microsoft computer chips, including Azure Cobalt. The organization works to deliver cloud hardware infrastructure at scale, with a focus on quality, delivery, cost, and sustainability. The Senior Physical Design Engineer will support silicon design by owning physical-design implementation from RTL through GDS. The role includes end-to-end execution from synthesis through place-and-route and completion of signoff activities, including timing, physical verification, EMIR, formal equivalence, and low-power verification. The engineer will work with cross-functional teams and partners to improve design tools, flows, and methodologies, and communicate project status and plans.

Requirements

  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or a related field and at least 1 year of technical engineering experience; or a master's degree in one of these fields and at least 4 years of technical engineering experience; or a bachelor's degree in one of these fields and at least 5 years of technical engineering experience; or equivalent experience.
  • Ability to meet Microsoft, customer, and/or government security screening requirements, including passing the Microsoft Cloud Background Check upon hire or transfer and every two years thereafter.
  • Provide proof of citizenship, U.S. permanent residency, or other protected status for export-control eligibility assessment; citizenship will be verified with a valid passport, with other applicable documents accepted for lawful permanent residents, refugees, and asylees.
  • Proven physical-design experience implementing designs through synthesis, floorplanning, place-and-route, extraction, timing, and physical verification.
  • Experience in low-power design methodology for SoCs.
  • Thorough understanding of SoC or subsystem design trade-offs across power, performance, and area (PPA).
  • Familiarity with clock-construction strategies for high-speed designs.
  • Technical expertise across physical design from synthesis through place-and-route and signoff, including timing, physical verification, EMIR, formal equivalence, and low-power verification.
  • Problem-solving and data-analysis skills.
  • Ability to communicate effectively with cross-functional teams.

Nice To Haves

  • At least 7 years of experience in semiconductor design.
  • Bachelor's or master's degree in Electrical Engineering, Computer Engineering, or a related field.
  • Communication, collaboration, and teamwork skills, including the ability to contribute to diverse and inclusive teams.
  • Production silicon tape-out experience in advanced foundry process nodes.
  • Experience owning complete physical-design execution of a medium- to large-size SoC block as a hands-on individual contributor and collaborating across teams.
  • Experience partnering with PD flow/CAD and methodology teams to identify and resolve PD TFM issues.

Responsibilities

  • Drive end-to-end execution from synthesis through place-and-route for large designs, completing signoff stages including timing, physical verification, EMIR, formal equivalence, and low-power verification.
  • Own clock construction and clock-tree synthesis (CTS).
  • Drive methodology exploration to optimize SoC blocks for clock construction and related methodology.
  • Coordinate with CAD, RTL/design, DFT, architecture, power and performance, technology, and other internal and external partners.
  • Implement RTL-to-GDS in the physical-design domain.
  • Influence design tools, flows, and methodologies for construction, signoff, and optimization using a data-driven approach.
  • Collaborate across teams to deliver solutions aligned with a One Microsoft mindset.
  • Demonstrate technical expertise across physical-design domains.
  • Communicate project status and planning clearly.
  • Demonstrate Microsoft core values, including customer focus, adaptability, collaboration, growth mindset, drive for results, influence for impact, judgment, and diversity and inclusion.

Benefits

  • The posting states that certain roles may be eligible for benefits and other compensation, with further information available through the linked Microsoft careers page.
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