Senior Manager - Analog Design
About The Position
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career. THE ROLE: AMD seeks a candidate who will be managing the Memory I/O design team supporting the definition, specification, system simulation and implementation of future LPDDR IPs. The focus of the activity will be centered around the circuit architecture and design of critical high-speed analog and digital blocks, definition of specifications for the high speed data path; definition of algorithms for calibration, equalization; and development of abstracted models for link performance simulations.
Requirements
- Analytical thinking and inventive spirit in combination with a solid understanding of risks and risk mitigation.
- Strong/effective communication skills and enthusiastic team-first mentality.
- Bachelors, Masters or Ph.D. degree in computer engineering/Electrical Engineering.
Nice To Haves
- A proven track record of successfully leading execution of multiple PHY designs with very good Silicon results.
- A proven successful track record in circuit-architecture and modeling for High Speed IOs
- Solid and hands-on knowledge of algorithms and equalization/calibration/clocking techniques for high-speed circuit design.
- Solid knowledge of industry-standard tools and best-in-class practices for PHY modeling, both in terms of abstracted models (e.g. Matlab/Simulink) as well as Verilog/AMS-based.
- Good knowledge of IO and system integration (signaling/equalization techniques, signal integrity, power integrity).
- Ability to dig into RTL or FW code supporting the custom circuit implementation
- Minimum 5+ years of team management experience leading multiple IPs from design to production
Responsibilities
- Manage and contribute to the definition of circuit architecture and to the design implementation of various state-of-the-art, low power blocks, and area efficient circuits for LPDDR PHYs
- Work closely with various disciplines, especially Analog Mixed Signal design, Digital Design and Firmware, as well as Design Verification to ensure optimal implementation of the overall PHY architecture and algorithms and full coverage of the features
- Manage execution and deliverables across customers and stakeholders
- Develop models for link-level statistical performance simulation of the PHY (Link Training, PHY, DRAM, DB/RCD, DFE training, Transmit Equalization) and application of the same to the development and optimization of design.
- Documentation of the micro-architecture and algorithms, and guidance of Analog, Digital, Firmware and Verification teams on the training and verification of the circuits.
- Participate and contribute to the definition of development flows that improve efficiency and quality of execution
Benefits
- AMD benefits at a glance.
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What This Job Offers
Job Type
Full-time
Career Level
Senior
