Senior Hardware Engineer - SoC Electrical Failure Analysis (Hybrid)

Cisco•San Jose, CA

3d•$165,000 - $241,400•Hybrid

About The Position

The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms—like Silicon One—are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world. Cisco Silicon One is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches through web-scale data centers and across service providers, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing, and testing some of the most complex ASICs being developed in the industry. Welcome to the Electrical Post-Silicon Validation Team at Cisco! Our group offers an outstanding combination of a startup culture with the benefits of working for the leading networking company in the world. You will engage in dynamic collaboration with verification engineers, designers, and cross-functional teams, working together to ensure the successful verification and quality of the ASIC throughout its lifecycle. Operating at the forefront of technology, we work with cutting-edge, high-speed, and power-hungry devices. Our small, but highly influential team thrives in this challenging environment, leveraging our expertise to impact the future of networking technology. With a commitment to excellence and a passion for transformative technology, we are shaping the future of high-performance Networking devices and delivering unparalleled value in every project we undertake. Join us and be a part of a team where professionalism meets impact. We are seeking a versatile Senior Hardware Engineer to join the team. Your involvement across multiple stages of the product lifecycle offers a unique opportunity to engage with a broad range of technical fields. In this highly visible role, you will play a key part in ensuring our products perform reliably, from pre-silicon validation and post-silicon bring-up through manufacturing support, field issue resolution, and ongoing quality and reliability improvements.

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or related field and 6+ years of relevant experience, or Master's degree in Electrical Engineering, Computer Engineering, or related field and 3+ years of relevant experience, or PhD in Electrical Engineering, Computer Engineering, or related field and 1+ years of relevant related work experience.
Relevant experience: Electrical post-silicon validation (Vmin, leakage, PVT characterization, …), SoC failure analysis, Power and signal integrity, High speed mixed-signal design, DFT, SRAM design and/or integration.
Experience in driving SoC failure analysis efforts.

Nice To Haves

Experience in brining up complex SoC
Experience with electrical diagnostics and measurement equipment (Oscilloscopes, VNA, BERT, logic analyzers...)
Experience in high-speed physical interfaces
Experience in design for test (DFT)
Experience in physical and/or logic design
Experience in memory design and MBIST
Experience with schematics and layout files for sophisticated electrical systems
Software development experience with Python, C++ or similar language
Understanding of networking fundamentals and protocols

Responsibilities

Lead and participate in failure analysis efforts, determining contributing factors and corrective actions
Lead activities aiming at improving product performance, yield, and reliability
Define, and refine post silicon validation plans covering functionality, performance characterization, and reliability
Capture, analyze, and interpret device performance, waveforms, eye diagrams, jitter, BER, PDN measurements, power supply stability and noise.
Validate system-level behavior under real-world networking workloads
Contribute to the chip screening test and observability software library (Python, C++)

Benefits

medical, dental and vision insurance
a 401(k) plan with a Cisco matching contribution
paid parental leave
short and long-term disability coverage
basic life insurance
grants of Cisco restricted stock units
10 paid holidays per full calendar year
1 floating holiday for non-exempt employees
1 paid day off for employee’s birthday
paid year-end holiday shutdown
4 paid days off for personal wellness
16 days of paid vacation time per full calendar year (non-exempt)
flexible vacation time off program (exempt)
80 hours of sick time off provided on hire date and each January 1st thereafter
up to 80 hours of unused sick time carried forward
Additional paid time away may be requested to deal with critical or emergency issues for family members
Optional 10 paid days per full calendar year to volunteer
annual bonuses (non-sales roles)
performance-based incentive pay (sales roles)