Senior Hardware Engineer - Micro-Architect

quadric•Burlingame, CA
•$150,000 - $220,000

About The Position

Quadric is hiring a senior member of its chip design team to contribute across all stages of processor design for its programmable General Purpose Neural Processing Unit (GPNPU), which runs neural-network inference and conventional C++ code on a single architecture. The role contributes to processor architecture definition, microarchitecture, RTL implementation, power, performance and area (PPA) optimization, and timing closure through the full product cycle, including front end, back end, and tapeout. The successful candidate will independently own a major design block, develop a deep understanding of the processor architecture and software interfaces, debug issues across the software and hardware stack, and package designs for customer releases while incorporating customer feedback. Quadric prefers a candidate in the California Bay Area who can regularly collaborate from its Burlingame office. Occasional onsite meetings and offsite events are expected for all team members. Quadric develops edge-AI processor technology for automotive, industrial, robotics, and embedded applications. The position offers a base salary range of $150,000 to $220,000, plus equity and a discretionary annual performance bonus, as applicable to the role and level.

Requirements

  • BS, MS, or Ph.D. in Electrical or Computer Engineering.
  • At least five years of CPU, GPU, or ASIC front-end design experience.
  • Proficiency in SystemC, SystemVerilog, or Verilog.
  • Strong background in computer architecture.
  • Knowledge of design techniques for low-power digital design.
  • Knowledge of VCS and Verilog/C co-simulation.
  • Experience in data-parallel hardware design for high-performance computing.
  • Experience in logic synthesis and performance modeling.

Nice To Haves

  • Experience in FPGA design.
  • Experience marketing semiconductor IP, AI accelerators, SoCs, EDA tools, or developer platforms.
  • Familiarity with automotive safety (ASIL) standards.

Responsibilities

  • Contribute to processor architecture definition by understanding its applications.
  • Own microarchitecture definition and RTL implementation of the processor in SystemC or SystemVerilog.
  • Own power, performance, and area (PPA) optimization.
  • Contribute to timing closure throughout the full product cycle, including front end, back end, and tapeout.
  • Independently own a major design block and improve PPA.
  • Develop an in-depth understanding of the architecture and software interfaces, and debug issues across the full software and hardware stack.
  • Package designs for customer releases and incorporate customer feedback.
  • Participate in occasional onsite meetings and offsite events.

Benefits

  • Medical, dental, and vision insurance from day one, with premiums covered at 99% for employees.
  • Company-paid life insurance.
  • Voluntary supplemental life insurance.
  • Short-term and long-term disability insurance.
  • Commuter support, including parking or Caltrain reimbursement.
  • Flexible spending account (FSA) and health savings account (HSA).
  • Equity.
  • Paid parental leave.
  • 401(k) retirement plan.
  • Flexible PTO.
  • Winter holiday shutdown.
  • Catered lunch each day in the office.
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