Senior FPGA/AIE Engineer

Elveo•Chantilly, VA
•Onsite

About The Position

Elveo is developing cellular-based space payloads and seeks engineers with expertise and experience designing and developing custom software-defined radio (SDR) platforms. Aspects of the position require an understanding of FPGA hardware, firmware, digital signal processing, and algorithms for SDR-based satellite communication. As a Senior FPGA/AIE Engineer, you will support the development of custom radio platforms for the primary (cellular service link) and secondary (TT&C / feeder link) communication links. The platform will initially be tested in a lab environment, then on the payload prototype in a lab environment that simulates orbit operations, and finally in space. The Senior FPGA Engineer will also be responsible for designing and implementing methods for ensuring successful testing, verification, and validation.

Requirements

  • A Bachelor’s degree (or higher) in Electrical Engineering, Computer Engineering, or related field.
  • At least five years of recent related experience
  • At least three years of recent experience working with Xilinx/Altera FPGAs.
  • Proficient in at least one of the following: SystemVerilog programming, AMD Versal SoC programming, AIE-ML or AIE programming, specifically intrinsic based development.

Nice To Haves

  • Experience with timing closure for high utilization FPGA builds.
  • Experience with FPGA SoCs and Bare Metal or Petalinux design flows.
  • Experience with UVM or hardware in the loop testing methodologies.
  • Experience with RFICs and multi chip synchronization.
  • Experience with high-speed interfaces such as JESD204C and high speed Ethernet.
  • Knowledge of the physical layer of cellular standards (e.g., GSM, LTE, 5G) is a plus.

Responsibilities

  • Design and test high-speed FPGA systems for satellite communication systems.
  • Build with AMD Versal hard IP such as AIE, NoC, CIPS, MRMAC, and DDR controllers.
  • Model and implement DSP algorithms in RTL or AMD AIE/AIE-ML processors.
  • Implement device driver software in C, C++, or other languages for a Linux environment.
  • Develop and maintain documentation and ICDs for in-house IP blocks and other related components.
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