Senior Engineer, GPU RTL Power

Samsung Electronics•Austin, TX

3d•$124,000 - $186,000•Onsite

About The Position

Samsung, a world leader in advanced semiconductor technology, is founded on a simple philosophy – the endless pursuit of excellence will create a better world for all. At Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL), we are building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices (mobile, automotive, and other custom market segments) consumed by millions of people around the world. Come build with us! As a Senior GPU RTL Power Engineer, you will contribute to power optimization efforts for GPU blocks and subsystems, delivering industry-leading energy efficiency for Samsung’s next-generation mobile GPUs used in premium smartphones and adjacent market segments. In this mid-to-senior individual contributor role, you will partner closely with hardware, software, and system-level design teams to support architectural, microarchitectural, and RTL-level power optimization strategies. You bring curiosity and knowledge in GPU/CPU microarchitecture, RTL power analysis, and low-power design techniques, along with a collaborative mindset that enables scalable, power-efficient, and high-performing designs across multiple GPU IP generations. You contribute to GPU power optimization strategy at the RTL and microarchitecture level, defining power-efficient design choices, PPA tradeoffs, and optimization techniques that balance performance, power, and area across GPU blocks and subsystems. You enjoy learning about detailed RTL power analysis and root-cause investigations using industry-standard tools and real-world workloads, help identifying power bottlenecks, switching inefficiencies, and exploring architectural trade-offs while estimating the power and performance impact of features across benchmarks and gaming scenarios. You support technical excellence by collaborating with RTL designers, performance architects, modeling, implementation, and validation teams to implement power-saving techniques, such as clock gating, voltage scaling, and low-power modes, to deliver IP designs with market-differentiating power and performance results. You help advancing cross-functional collaboration with hardware, software, and system teams to align power optimization strategies with architectural intent, workload behaviors, and system-level performance goals, while maintaining clear documentation of methodologies, strategy, results, and best practices. You take initiatives on moderate-to-complex projects and help advance best practices, methodologies by staying ahead of emerging GPU technologies and exploring new power-optimizing techniques.

Requirements

2+ years of experience with a Bachelor's degree in Computer Science/Computer Engineering/relevant technical field, or a Master's degree.
Hands-on experience in GPU/CPU architecture, microarchitecture, and high-performance digital design with PPA tradeoffs.
Familiarity with RTL power analysis and optimization using tools such as PowerArtist, PTPX, Empower, or equivalent.
Working knowledge of SystemVerilog and ASIC design flow, including RTL design, synthesis, timing analysis, and power optimization.
Familiarity with low-power design techniques, including clock gating, power gating, and managing dynamic vs. leakage power tradeoffs.
Proficiency with scripting languages such as Python or Perl.
Understanding of physical design and STA flows and their interaction with power optimization.
Excellent debugging, analytical, and problem-solving skills using data-driven approach.
Excellent written and verbal communication skills for documenting designs, methodologies, and best practices.
Excellent collaboration skills, with the ability to navigate ambiguity in a fast-paced, global team environment.

Responsibilities

Contribute to power optimization efforts for GPU blocks and subsystems, delivering industry-leading energy efficiency for Samsung’s next-generation mobile GPUs.
Partner closely with hardware, software, and system-level design teams to support architectural, microarchitectural, and RTL-level power optimization strategies.
Contribute to GPU power optimization strategy at the RTL and microarchitecture level, defining power-efficient design choices, PPA tradeoffs, and optimization techniques.
Perform detailed RTL power analysis and root-cause investigations using industry-standard tools and real-world workloads.
Identify power bottlenecks, switching inefficiencies, and explore architectural trade-offs while estimating the power and performance impact of features.
Collaborate with RTL designers, performance architects, modeling, implementation, and validation teams to implement power-saving techniques.
Advance cross-functional collaboration with hardware, software, and system teams to align power optimization strategies with architectural intent, workload behaviors, and system-level performance goals.
Maintain clear documentation of methodologies, strategy, results, and best practices.
Take initiatives on moderate-to-complex projects and help advance best practices and methodologies by staying ahead of emerging GPU technologies and exploring new power-optimizing techniques.