Sr.DSP Engineer (Remote with Travel)

Fairwinds Technologies•Leesburg, MD

15d•$175,000 - $200,000•Remote

About The Position

Fairwinds Technologies is seeking a Senior DSP Engineer with deep expertise in RF communications signal processing and hands-on implementation experience on Xilinx UltraScale+, RFSoC, and Versal platforms. The role focuses on developing and fielding practical DSP solutions for real-world RF systems, including novel approaches when performance, latency, interference, or mission constraints require them. The engineer will collaborate with RF, FPGA/embedded, systems, and customer teams to deliver mission-critical communications and signal-processing capabilities for RF Tactical & Naval Military Solutions and strategic border-protection applications. The position reports to the Chief Technology Office. It is remote within the DMV and Florida, with 25–30% travel when required. The work is primarily performed in a traditional office environment. This is a full-time, exempt role, Monday through Friday, 40 hours per week; occasional evening and weekend work may be required, and some flexibility in work hours may be offered.

Requirements

Master’s degree or PhD in Electrical Engineering, Computer Engineering, Applied Mathematics, Physics, or a related field.
15 or more years of relevant DSP engineering experience, with demonstrated delivery of RF communications signal-processing solutions.
Practical experience processing RF communications signals, including development, validation, and performance characterization.
Strong fundamentals in communications and statistical signal processing, including detection and estimation, synchronization, spectral analysis, filtering, and modulation and demodulation concepts.
Experience implementing DSP on embedded or real-time systems and/or hardware-accelerated platforms, including Xilinx UltraScale+, RFSoC, and Versal.
Ability to simulate and/or model DSP algorithms using a suitable environment such as MATLAB or Modelsim, and to define or implement fixed-point functions where applicable.
Demonstrated ability to develop innovative DSP approaches when standard methods are insufficient, with strong analytical rigor.
Proficiency in at least one of Python, C/C++, HDL (VHDL or Verilog), MATLAB, or an equivalent, with disciplined software-engineering practices.
Experience working with cross-functional RF, FPGA, embedded, and systems teams to deliver complete system solutions.
U.S. citizenship and an active DoD Secret or higher security clearance, or ability to obtain one.
Must be eligible to work in the United States and possess or obtain a Secret-level clearance.
Willingness to travel 25–30% when required.

Nice To Haves

Experience with multi-carrier channelizers, DDC/DUC architectures, polyphase filter banks, efficient FFT-based processing, and real-time spectral sensing.
Experience with timing and synchronization challenges, including PPS/10 MHz disciplining, phase-coherent multichannel systems, and TDOA/FDOA concepts.
Familiarity with JESD204B/C high-speed converter interfaces and RF front-end integration considerations such as AGC, spur mitigation, and calibration.
Exposure to electronic-warfare or interference environments, adaptive filtering, beamforming concepts, or robust waveform processing under jamming.
Experience with embedded Linux on Zynq/RFSoC/Versal platforms and real-time streaming architectures.
Python scripting and automation for test harnesses, regression, and performance sweeps.
Working knowledge of applicable 3GPP 38.211–38.214 standards related to the 4G/5G physical layer, at a minimum of Release 17.
Experience supporting DoD SBIR projects or similar government-funded R&D efforts.

Responsibilities

Design, develop, and optimize DSP algorithms for RF communications signals, including waveform processing in contested and dynamic environments.
Lead algorithm development from concept through prototype to implementation, balancing performance, latency, robustness, and computational constraints.
Implement and validate DSP solutions on heterogeneous compute platforms, including Xilinx RFSoC, UltraScale+, and Versal, using programmable logic, processing-system resources, and hardware acceleration as appropriate.
Collaborate with FPGA engineers to translate algorithms into hardware-realizable architectures, including fixed-point design, throughput and latency optimization, resource trade studies, and hardware-friendly formulations.
Work with embedded software engineers to integrate real-time DSP pipelines, including drivers, data movement, DMA, streaming interfaces, buffering strategies, and runtime configuration.
Develop and execute test and verification strategies using lab instrumentation and captured RF datasets, and characterize performance under impairments.
Develop simulation and analysis environments using tools such as MATLAB/Simulink and Python, and correlate simulation results with hardware and field behavior.
Provide technical leadership by defining architecture, conducting design reviews, mentoring engineers, and explaining trade-offs to stakeholders.
Produce DSP design descriptions, algorithm specifications, performance reports, ICD inputs, and SBIR deliverables as required.
Support integration, debugging, and field-test activities across DSP, RF, FPGA, and embedded software domains.