Senior ASIC Verification Engineer, Low Power AI Subsystems

Qualcomm • Markham, ON

4d • CA$104,900 - CA$154,900

About The Position

Qualcomm Technologies Low Power Audio/AI products are designed to offer premium wireless connectivity, high levels of integration, immersive sound quality, and on-device AI for smart audio and context aware applications. An ultra-low power subsystem within a low power SoC; a chip-within-a-chip HW block incorporating multiple always-on IP's, design execution within this group requires solving ground-breaking challenges and multiple power domain crossing issues. As we pioneer new and/or improved functionality, we innovate to minimize power consumption. Make a difference, join a team on the cutting edge and become an integral part of Qualcomm’s growth and momentum. This is a new position where we are looking for an ASIC Verification Engineer to be part of our team to innovate and design complex leading, ultra-low power, solutions for audio and context aware applications.

Requirements

• 3+ years ASIC design, verification, implementation or related work experience
• Proficiency with Verilog/VHDL RTL design languages and ability to write clean, readable, synthesizable RTL.
• Solid understanding of ASIC/VLSI concepts
• Hardware verification languages (HVL): SystemVerilog testbench (UVM), and/or SystemC,
• Hardware description languages (HDL): Verilog and/or SystemVerilog
• Good working experience with C (basic level or C++ sufficient)

Nice To Haves

• Knowledge in one or more of the following disciplines is preferred: Audio (MP3, MIDI, etc.), Bus/interconnect (AHB, AXI), CPU (ARM v8/v7, Cache, MMU, security, etc.).
• Strong knowledge of digital circuits and event-driven simulators
• Knowledge of Perl, tcsh, Python and GNU Make is a strong asset
• Experience with automotive safety concepts and standards such as ISO26262

Responsibilities

• Contribute to core verification during the pre/post silicon phase of next generation ASICs through simulation
• Drive test plan development, execution and verification closure in conjunction with the design and verification teams
• Contribute to creating/maintaining a test bench, assertions, and functional coverage models with scalability and reuse as key goals
• Contribute to implementing flows to automate development processes. Identify areas for improvement and drive them to completion
• Lead complex debug activities through the development cycle (pre and post-silicon)
• Provide technical supervision to other engineers and have the ability to lead by example
• Work closely with design to define verification methodology, Provide test plans and develop required tests.

Benefits

• competitive annual discretionary bonus program
• opportunity for annual RSU grants
• highly competitive benefits package is designed to support your success at work, at home, and at play.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior