ASIC Verification Engineer
About The Position
NVIDIA’s Clocks team is looking for an experienced ASIC Design Verification engineer to join our team! The NVIDIA Clocks Team is committed to deliver high-quality clocking and reset logic to various units in SOC and GPU ASIC. The complexity of the clocks and resets design has increased many folds. This requires sophisticated verification to deliver a bug free clocks design to power our product lines ranging from Data Centers, Consumer graphics to Self-driving cars and the growing field of artificial intelligence. Modern clocking verification solutions need to be innovative, ensure quality in covering the complex design specifications and balance the constraints on infrastructure, re-usability, testing speed and multi-platform support.
Requirements
- BS or MS in EE/ECE or equivalent experience
- 3+ years of proven design verification experience
- Good understanding of Logic Design and Architecture
- Expertise in industry-standard verification flows like SV constraint random verification, UVM, Formal Verification, Coverage metrics, profiling tools, X prop, etc
- Exposure on block level and system-level verification
- Strong coding skills in System Verilog, scripting languages (Perl/python), and C++
- Ability to collaborate and work with multiple groups
- Prior experience in implementing Test plans for pre-silicon platforms
Nice To Haves
- Previous experience automating tasks in the design verification process
- Hands on experience in object-oriented programming
- Prior design or verification experience at the IP or block level
- Experience developing methodologies used by others
- Demonstrated ability to drive a project to completion
Responsibilities
- Own validation of Clocking structures in Tegra and GPU products from start to finish, including test plan development, automation, validation flows development, coverage metrics, test execution, bug identification/fix and productization.
- Tackle Sophisticated problems and develop a scalable solution that works across platform.
- Hands on industry-standard tools and state of the art verification methodologies. This includes coding in System Verilog, UVM, C++, Perl, Python and NVIDIA custom compilers and tools.
- Partnering closely with our clocks architecture and design team to validate our clocks design.
- Coordinate with internal and external teams across time zones.
Benefits
- equity
- benefits
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What This Job Offers
Job Type
Full-time
Career Level
Mid Level
Education Level
Associate degree
