ASIC Verification Engineer

Broadcom•San Jose, CA

4d•$101,000 - $162,000

About The Position

Broadcom's High Speed Interconnect Product (HSIP) Group is seeking a bright, motivated, innovative, and hardworking recent graduate with a minimum of 3 years of experience to join their top-notch engineering team. This role involves utilizing learned technical skills and developing new ones in the verification of communication ASICs with leading-edge technologies and tools. The engineer will collaborate with marketing, architecture, firmware, physical, and layout teams throughout the full product development cycle, from definition to production, gaining valuable experience for a successful career in ASIC development.

Requirements

Bachelors in Engineering and 5+ years of related experience or Masters degree in Engineering and 3+ years of related experience or PhD and no experience
Design/Verification experience, or equivalent experience.
Logic design, Electronic circuit design and related course work to provide a broad background in the area of ASIC design and verification.
Proficiency with HDL language such as Verilog, SystemVerilog or VHDL is a must.
Self-motivated, good communicator, quick learner and good team player.
Display positive attitude and demonstrate flexibility in day-to-day work.

Nice To Haves

Proficiency with C/C++ programming language and hands-on exposure to Object Oriented Programming is a big plus.
Proficiency with scripting in various languages such as Python, PERL, TCL is a big plus.

Responsibilities

Develop thorough understanding of IEEE Ethernet protocols.
Understand chip architecture, microarchitecture and design specification.
Develop advanced verification environment and testbench components in SystemVerilog UVM.
Participate in block level and chip level verification tasks.
Infrastructure work including developing scripts and tools for efficiency and quality improvements.