Security Lead - Multiple Openings

Axiado•San Jose, CA
•$151,000 - $152,000•Onsite

About The Position

The Security Lead assesses the effectiveness of information security controls using defined security performance indicators and plans and oversees security testing across QEMU, HAPS, and HTG FPGA emulation environments. The role designs and implements TPM-integrated data protection and encryption solutions using NIST-approved algorithms, including ECDSA, SHA, and AES, anchored by secure boot and root of trust architectures to establish a hardware-anchored chain of trust from power-on through the OS and application layers. The position investigates information security breaches and troubleshoots security problems on complex SoC platforms using Lauterbach TRACE32 and SEGGER J-Link debuggers with JTAG interfaces. It also develops and maintains information security policies, standards, and control test plans aligned with applicable cybersecurity standards and regulations; documents security incidents; reviews internal and external security assessments; and recommends improvements to enhance compliance and reduce information security risk.

Requirements

  • Master's degree or foreign equivalent in Electrical Engineering, Computer Engineering, or a closely related field.
  • One year of experience as a Security Lead, Computer Programmer, Embedded Security Engineer, Computer Vision Intern, Software Intern, Test Engineer, or in a related occupation.
  • One year of experience with Secure Boot.
  • One year of experience with Root of Trust (RoT).
  • One year of experience with Trusted Platform Module (TPM).
  • One year of experience with ECDSA, SHA, and AES cryptographic algorithms.
  • One year of experience with QEMU, HAPS, and HTG FPGA emulators.
  • One year of experience with Lauterbach TRACE32 and SEGGER J-Link debuggers.

Responsibilities

  • Assess the effectiveness of information security controls using defined security performance indicators.
  • Plan and oversee security testing to ensure security measures function properly across QEMU, HAPS, and HTG FPGA emulation environments.
  • Design and implement TPM-integrated data protection and encryption solutions using NIST-approved algorithms, including ECDSA, SHA, and AES.
  • Use secure boot and root of trust architectures to establish a hardware-anchored chain of trust from power-on through the OS and application layers.
  • Investigate information security breaches, identify vulnerabilities, and troubleshoot security problems on complex SoC platforms using Lauterbach TRACE32 and SEGGER J-Link debuggers with JTAG interfaces.
  • Develop and maintain information security policies, standards, and control test plans aligned with applicable cybersecurity standards and regulations.
  • Investigate and document security incidents.
  • Review internal and external security assessments and recommend improvements to enhance compliance and reduce information security risk.
© 2026 Teal Labs, Inc
Privacy PolicyTerms of Service