The Security Lead assesses the effectiveness of information security controls using defined security performance indicators and plans and oversees security testing across QEMU, HAPS, and HTG FPGA emulation environments. The role designs and implements TPM-integrated data protection and encryption solutions using NIST-approved algorithms, including ECDSA, SHA, and AES, anchored by secure boot and root of trust architectures to establish a hardware-anchored chain of trust from power-on through the OS and application layers. The position investigates information security breaches and troubleshoots security problems on complex SoC platforms using Lauterbach TRACE32 and SEGGER J-Link debuggers with JTAG interfaces. It also develops and maintains information security policies, standards, and control test plans aligned with applicable cybersecurity standards and regulations; documents security incidents; reviews internal and external security assessments; and recommends improvements to enhance compliance and reduce information security risk.
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Job Type
Full-time
Career Level
Senior