RTL Design Manager

Advanced Micro Devices, Inc•San Jose, CA
•Hybrid

About The Position

As an RTL Design Manager for the AECG IP & SOC group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.

Requirements

  • Strong front-end RTL engineering background
  • Strong communication skills, able to summarize complex problems for executives as well as drill down to details with architects and engineers
  • Strong analytic and problem solving skills including the ability to analyze current behavior, identify potential areas for improvement, and design of experiment
  • Bachelors or Masters degree in computer engineering/Electrical Engineering

Nice To Haves

  • Experience with Arm architecture and APB, AXI, CHI protocols
  • Experience with design reuse, including RTL, constraints, and waivers
  • Experience with SoC level design integration
  • Experience with automation using scripting techniques such as PERL, Python, or Tcl
  • Experience with timing constraints and timing exceptions
  • Experience running standard quality checks such as LINT and CDC
  • Experience designing with multiple power domains including writing UPF
  • Must be a self-starter and self-motivated

Responsibilities

  • Lead a small, high-performance engineering team
  • Own the design and implementation of blocks to meet functional, timing, area and power requirements
  • Guide and review verification for these blocks
  • Design and implement logic functions that enable efficient test and debug
  • Implement automation to increase design team efficiency

Benefits

  • AMD benefits at a glance
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