Research Scientist, Gate Measurement, Quantum AI

Google•Goleta, CA
•$147,000 - $210,000

About The Position

The Gates team is executing a multipronged research program to reach the fidelities required for long-lived logical qubits. The Research Scientist will identify noise processes through precise error benchmarking and use the results to inform new gate designs and architecture parameters. The role will implement improved error-metrology circuits and cross-validate them with physical models developed by the theory team. It will also conduct detailed architecture analysis and simulations and define hardware requirements for new gate designs in forward-looking architectures. The Research Scientist will collaborate with other research scientists, hardware engineers, and software engineers to advance high-performance quantum computing. Google Quantum AI’s mission is to build a large-scale quantum computer capable of complex, error-corrected computations and to enable solutions to classically intractable problems.

Requirements

  • PhD in Physics, Applied Physics, Electrical Engineering, or a related technical field, or equivalent practical experience.
  • Experience collecting and analyzing data in an experimental setting.
  • Experience with programming and statistical analysis of datasets.
  • Experience with techniques to characterize and calibrate hardware performance.

Nice To Haves

  • Experience in analysis and modeling of multi-qubit quantum platforms.
  • Experience collecting and analyzing data in an experimental setting.
  • Experience with techniques to characterize and calibrate hardware performance.
  • Proficiency with programming and statistical analysis of large datasets.

Responsibilities

  • Characterize and identify limiting error mechanisms in quantum logic gates.
  • Collaborate with the theory team to build and verify physics models for noise and error processes in quantum logic gates.
  • Perform detailed architecture modeling, analyze design parameters, and build hardware system specifications for forward-looking architectures.
  • Develop software infrastructure and tools for wider team use.
  • Implement improved error-metrology circuits and cross-validate them with physical models from the theory team.
  • Conduct detailed architecture analysis and simulations and define hardware requirements for new gate designs.

Benefits

  • 15% bonus target
  • Equity
  • Benefits
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