Quantum Error Correction Engineer - W/M

Pasqal

4d•Hybrid

About The Position

Pasqal designs and develops Quantum Processing Units (QPUs) and associated software tools. Our innovative technology enables us to address use cases that are currently beyond the reach of the most powerful supercomputers; these cases can concern industrial application challenges as well as fundamental science needs. In addition to the exceptional computing power they provide, QPUs are highly energy efficient and will contribute to a significant reduction in the carbon footprint of the HPC industry. Within the Hardware department, the Quantum Error Correction (QEC) team develops error-correcting codes and protocols that allow quantum computation to be carried out in a fault-tolerant way. It includes selecting error-correcting codes tailored to Pasqal hardware, designing fault-tolerant logical gates, developing decoders, and benchmarking QEC performance, analyzing experimental data to develop logical error models and budgets, and building and maintaining numerical libraries to simulate QEC protocols.

Requirements

PhD or equivalent experience in quantum error correction, fault-tolerant quantum computing, or a related field.
Strong understanding of quantum error-correcting codes, decoding methods, and fault-tolerant protocols.
Interest in neutral-atom platforms and the ability to account for realistic hardware constraints in QEC studies.
Strong programming skills for scientific computing (e.g., Python), including data analysis and simulation workflows.
High level of autonomy and rigor.
Ability to work at the interface between theory, numerical simulation, and experimental constraints.
Proven ability to collaborate with multidisciplinary teams.
Strong communication and listening skills.
Ability to prioritize and deliver in a fast-paced environment.
Good level of written and spoken English.

Nice To Haves

Experience in driving small technical projects, including planning, prioritization, and delivery, is a plus.

Responsibilities

Select, adapt, and benchmark quantum error-correcting codes and protocols under realistic neutral-atom hardware constraints, including detection, decoding, and correction strategies.
Develop and evaluate decoding approaches, and quantify QEC performance under realistic noise models.
Develop and maintain logical error models and error budgets, and connect them with physical noise models, experimental data, and internal emulators.
Contribute to the design and benchmarking of fault-tolerant logical operations and logical gate strategies.
Provide QEC-driven inputs to the design of future QPU architectures, including constraints on layout, zoning, connectivity, and operation scheduling.
Develop and maintain QEC simulation tools consistent with internal models and assumptions.
Write reports, technical documents, and scientific articles.
Contribute to the identification and protection of patentable technical ideas.
Represent the company at international conferences, workshops, and industry events.