Product Line Manager, Optical I/O Chiplets

Ayar Labs • San Jose, CA

6h • $170,000 - $223,000 • Onsite

About The Position

Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we use light instead of electricity to move data faster, further, and with a fraction of the energy needed to fuel the explosive growth of AI models. Backed by NVIDIA, AMD, and Intel and manufactured in partnership with the world's leading semiconductor ecosystem, Ayar Labs' co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. You will own the commercial and technical success of TeraPHY™, our optical I/O chiplet product line — one of the most advanced heterogeneous silicon products in the industry. This is a chip productization role: you drive the product from definition through tapeout, bring-up, qualification, and high-volume manufacturing, then position it to win the AI scale-up market. We're looking for a product leader who has taken a complex advanced-node chip or SoC from concept to volume production. Experience with networking, optics and photonics is a plus.

Requirements

• BS in Electrical Engineering or equivalent
• 5+ years in product management or technical product roles for advanced-node silicon — chiplets, I/O die, SoCs, networking ASICs, SerDes, or memory interfaces.
• Demonstrated ownership of a complex chip from definition through high-volume production, including foundry/OSAT engagement, reliability qualification, and test/yield ramp.
• Strong grounding in advanced packaging (2.5D/3D, chiplet integration), UCIe or comparable die-to-die interconnect, and high-speed SerDes/signaling.
• Strong project management and communication skills.
• Self-motivated to execute with minimal direction.

Nice To Haves

• Experience with networking, optics and photonics is a plus.
• Silicon Photonics and optical communications experience is a plus.
• MS in Electrical Engineering or equivalent.
• MBA is a plus.

Responsibilities

• Own the product strategy for the TeraPHY™ optical chiplet family. Author comprehensive PRDs that set the direction for engineering and manufacturing execution.
• Drive the chiplet through the full product lifecycle — definition, tapeout, silicon bring-up, reliability qualification, test/yield ramp, and high-volume manufacturing. Steer the product through the internal PLC (Product Life Cycle) gate process in partnership with Engineering, Quality, Operations, and foundry/OSAT partners.
• Track the evolution of AI clusters, networking switch fabrics, and disaggregated memory to shape the I/O chiplet roadmap with target customers.
• Develop high-quality white papers, datasheets, application notes, and other collateral aimed at customers and partners.
• Act as the primary interface for Tier 1 Cloud Service Providers (CSPs), xPU architects, and networking OEMs on chiplet integration, co-packaging, and deployment into their platforms.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior