Process Engineer, Wafer Preparation & Assembly (Starlink/Akoustis)

SpaceX • Bastrop, TX

5d • Onsite

About The Position

SpaceX’s wholly owned subsidiary Akoustis provides RF filters using patented XBAW technology, supporting Starlink and SpaceX’s mission. The Process Engineer will develop, optimize, qualify, and implement the wafer-to-die preparation flow, including wafer thinning and backside processing, dicing, die cleaning and handling, laser marking, inspection, and final package singulation. The engineer will work hands-on with equipment and collaborate with package engineering, assembly, test, reliability, quality, and external manufacturers to deliver high-quality die for downstream yield and reliability.

The role is onsite in Bastrop, Texas, and includes up to 20% domestic and international travel for supplier and manufacturing support. Extended hours or weekends may be needed to support key milestones. The employee must be able to work in a semiconductor manufacturing environment, comply with safety and cleanroom requirements, and perform light physical tasks, including lifting up to 25 pounds and handling wafers, substrates, packages, and tooling. Applicants must meet applicable U.S. export-control eligibility requirements.

Requirements

• Bachelor's degree in chemical engineering, materials science, mechanical engineering, or another engineering discipline.
• At least 2 years of hands-on experience in semiconductor wafer processing, thinning, dicing, die preparation, or manufacturing; internship or extracurricular experience is applicable.
• Strong written and verbal communication skills with engineering, manufacturing, suppliers, and management.
• Ability to work in a semiconductor manufacturing environment, follow safety and cleanroom requirements, and perform light physical tasks, including lifting up to 25 pounds and handling wafers, substrates, packages, and tooling.
• Willingness to work extended hours or weekends to support key milestones.
• Must be a U.S. citizen or national, lawful permanent resident, qualifying refugee or asylee, or eligible to obtain required U.S. Department of State authorizations under export regulations.

Nice To Haves

• At least 3 years of hands-on semiconductor manufacturing experience, including wafer back-grinding or thinning (including wafers 150 µm or thinner) and mechanical dicing or blade selection.
• Experience operating and developing processes on semiconductor equipment, with understanding of wafer and die handling, process troubleshooting, and statistical process control.
• Experience with SiC or other hard materials, dicing tapes, blade dressing, two-step or partial-depth cutting, thin-film wafers, and die pick or handling equipment.
• Experience with laser marking of wafers or die using green, UV, or similar sources, and machine-vision/OCR mark verification.
• Experience with package singulation and understanding of warpage, stress, cracking, chipping, and delamination mechanisms.
• Experience with DOE, SPC, Cp/Cpk, FMEA, or Six Sigma; data analysis using JMP, Minitab, MATLAB, or Python.
• Experience with equipment qualification, process transfer, OSAT or external partner support, and familiarity with JEDEC, SEMI, or IPC standards.
• Familiarity with AutoCAD or SolidWorks.

Responsibilities

• Develop and qualify wafer back-grinding, thinning, stress-relief, and backside-finishing processes; establish thickness, TTV, bow, warp, and roughness targets while minimizing defects.
• Develop and optimize mechanical wafer dicing, including for thin wafers and difficult materials such as SiC; select blades, tapes, and process parameters while controlling chipping, sidewall quality, delamination, and street or exclusion requirements.
• Establish post-dicing die cleaning, drying, handling, tape mount and release, pick, sort, and presentation methods that protect die integrity, orientation, and traceability for assembly flows.
• Develop and qualify laser marking processes for wafers and bare die, optimize mark contrast and resolution, avoid damage, and implement vision/OCR verification.
• Develop final package singulation processes for organic, mold, ceramic, and metal structures; minimize defects and confirm impacts on warpage, electrical performance, and reliability.
• Run DOEs, define process windows and controls, troubleshoot defects, qualify equipment and consumables, incorporate supplier and production feedback, and transfer robust processes into manufacturing.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level