Principal Signal Integrity Engineer (SI/PI)
About The Position
Lead Signal and Power Integrity development as a Principal Engineer within AMD's Adaptive and Embedded Computing Group (AECG). This role will drive SI/PI strategy and execution across silicon, package, board, and system-level designs supporting next-generation FPGA and adaptive computing products. Working closely with Architecture, Package Design, PCB Design, Silicon Engineering, Product Engineering, and Manufacturing teams, this engineer will play a critical role in defining technical direction, making key design tradeoff decisions, mentoring junior engineers, and delivering successful products from simulation through hardware validation.
Requirements
- MS or PhD in Electrical Engineering preferred
- Excellent analytical and problem-solving skills with strong attention to detail.
- Proven ability to independently drive technical decisions and influence engineering direction.
- Strong communication and cross-functional collaboration skills.
- Hands-on experience performing lab measurements and correlating hardware results to simulation models.
- Deep expertise in Signal Integrity with working knowledge of Power Integrity concepts and methodologies.
- Experience with DDR, LPDDR, HBM, or other high-performance memory interfaces.
- Experience with FPGA, adaptive computing, ASIC, networking, datacenter, or high-performance computing platforms.
- Experience with PCB, package, and IC-level power delivery networks.
- Expertise with SI/PI analysis tools including ADS and HFSS; experience with SIwave and HSPICE is a plus.
- Strong foundation in electromagnetic theory, transmission lines, and circuit analysis.
- Experience mentoring engineers and driving technical leadership across organizations.
- Experience with programming in Python, C++, Matlab.
Responsibilities
- Responsible for technical solution development for Signal Integrity and Power Integrity.
- Drive system-level SI/PI architecture, design guidelines, and layout recommendations.
- Perform end-to-end channel simulations for high-speed serial interfaces and memory subsystems.
- Lead SI/PI analysis and optimization of DDR4, DDR5, LPDDR4, LPDDR5, HBM, and other high-performance memory interfaces.
- Correlate simulations with lab measurements and drive root-cause analysis of signal and power integrity issues.
- Collaborate with silicon, package, PCB, architecture, and manufacturing teams to resolve complex SI/PI challenges.
- Guide junior engineers on simulation methodologies, measurements, and debug techniques.
- Evaluate future package and PCB technologies to support next-generation FPGA and adaptive computing products.
Benefits
- AMD benefits at a glance.
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What This Job Offers
Job Type
Full-time
Career Level
Principal
