Principal Signal Integrity Engineer

Micron Technology • Boise, ID

7d

About The Position

Micron Technology is a world leader in memory and storage innovation, developing technologies that accelerate intelligence and enable the next era of AI, ML, and advanced computing. The Interface Pathfinding team operates at the leading edge, serving as a bridge between corporate strategy and engineering through forward-looking investigation and development of energy-efficient bandwidth solutions. Their work spans innovative circuit, signaling, packaging, and interconnect solutions with a 3–5 year technology horizon, grounded in rigorous analysis, hands-on measurement, and a commitment to building a robust intellectual property portfolio. As a Principal Signal Integrity Engineer, you will be a core technical contributor on a deliberately small, senior team united around the goal of preparing high-speed interface innovations for high-confidence product adoption.

Requirements

• MS or PhD in Electrical Engineering or related field (MS with strong electromagnetic/SI fundamentals accepted; PhD preferred but not sufficient on its own — demonstrated hands-on modeling and simulation capability is what differentiates)
• 10+ years of industry experience in signal or power integrity analysis applied to high-speed interface technologies
• Extensive experience applying electromagnetic and transmission line theory to SI/PI analysis of differential and single-ended interfaces
• Extensive experience with time- and frequency-domain simulation tools — ADS, HSPICE, SPECTRE, or equivalent
• Deep experience with electromagnetic field solvers — Q3D, SIWAVE, HFSS, or equivalent — including solver setup, mesh strategy, and result validation
• Working knowledge of hardware measurement tools — oscilloscopes, TDR, VNA — and their application to SI characterization
• Comfortable with broad ownership, cross-discipline collaboration, and making analytical decisions with real program consequences
• Strong written and verbal communication skills — this role produces modeling reports, link budgets, and design rule documents

Nice To Haves

• Familiarity with memory I/O architectures and their signal integrity constraints
• Experience with advanced packaging technologies — 2.5D/3D integration, embedded die, or high-density organic substrates — and their electromagnetic modeling challenges
• Post-silicon characterization experience — correlating simulation predictions to measured TDR, insertion loss, eye diagrams, or BER results
• Some familiarity with modeling optical links
• Willingness to learn and apply Artificial Intelligence -based methods to streamline modeling and simulation workflows
• Prior experience in a pathfinding or advanced development environment where analysis methodology is actively developed, not inherited

Responsibilities

• Generate and validate electrical models for packages, substrates, and interconnects used in forward-looking feasibility studies.
• Assess next-generation substrate technologies and provide strategic direction on their signal integrity implications.
• Perform SI analysis during feasibility studies and drive I/O + channel co-optimization, including coordination with supporting organizations.
• Drive progressive design rules that enable package and system-level performance scaling.
• Establish forward-looking link budgets and develop methodologies that connect simulation predictions to measured silicon outcomes.
• Own the generation and validation of interconnect models — from field solver extraction through time- and frequency-domain circuit simulation — serving as the authoritative source for model quality on the team.
• Lead SI assessment of forward-looking substrate and packaging technologies, translating physical characteristics into channel performance projections and strategic recommendations.
• Drive SI analysis during pathfinding studies, including I/O and channel co-optimization, and provide direction to supporting organizations when analysis is distributed.
• Develop and champion progressive package and system-level design rules grounded in electromagnetic analysis and simulation data.
• Define forward-looking link budgets and establish the sim-to-silicon correlation methodologies that give the team and product programs confidence in pre-silicon predictions.
• Collaborate across Signal Integrity, Circuit and Chip Design, Packaging R&D, and System Integration — translating SI findings into actionable guidance for partner teams.
• Author analysis reports, modeling methodology documents, and design rule specifications that serve as the authoritative reference for the team and follow-on programs.

Benefits

• Choice of medical, dental and vision plans
• Benefit programs that help protect your income if you are unable to work due to illness or injury
• Paid family leave
• Robust paid time-off program
• Paid holidays

What This Job Offers

• Job Type: Full-time
• Career Level: Principal